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* dt-bindings: update Luca Ceresoli's e-mail addressLuca Ceresoli2022-06-061-1/+1
| | | | | | | | | | My Bootlin address is preferred from now on. Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220603155727.1232061-2-luca@lucaceresoli.net
* dt-bindings: clock: Update my email addressJeffrey Hugo2022-06-021-1/+1
| | | | | | | | | | Update my email address from the defunct codeaurora.org domain to the current quicinc.com domain. Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1654118992-4026-1-git-send-email-quic_jhugo@quicinc.com
* Merge tag 'dmaengine-5.19-rc1' of ↵Linus Torvalds2022-05-291-0/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "Nothing special, this includes a couple of new device support and new driver support and bunch of driver updates. New support: - Tegra gpcdma driver support - Qualcomm SM8350, Sm8450 and SC7280 device support - Renesas RZN1 dma and platform support Updates: - stm32 device pause/resume support and updates - DMA memset ops Documentation and usage clarification - deprecate '#dma-channels' & '#dma-requests' bindings - driver updates for stm32, ptdma idsx etc" * tag 'dmaengine-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (87 commits) dmaengine: idxd: make idxd_wq_enable() return 0 if wq is already enabled dmaengine: sun6i: Add support for the D1 variant dmaengine: sun6i: Add support for 34-bit physical addresses dmaengine: sun6i: Do not use virt_to_phys dt-bindings: dma: sun50i-a64: Add compatible for D1 dmaengine: tegra: Remove unused switch case dmaengine: tegra: Fix uninitialized variable usage dmaengine: stm32-dma: add device_pause/device_resume support dmaengine: stm32-dma: rename pm ops before dma pause/resume introduction dmaengine: stm32-dma: pass DMA_SxSCR value to stm32_dma_handle_chan_done() dmaengine: stm32-dma: introduce stm32_dma_sg_inc to manage chan->next_sg dmaengine: stm32-dmamux: avoid reset of dmamux if used by coprocessor dmaengine: qcom: gpi: Add support for sc7280 dt-bindings: dma: pl330: Add power-domains dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it dmaengine: stm32-mdma: fix chan initialization in stm32_mdma_irq_handler() dmaengine: stm32-mdma: remove GISR1 register dmaengine: ti: deprecate '#dma-channels' dmaengine: mmp: deprecate '#dma-channels' dmaengine: pxa: deprecate '#dma-channels' and '#dma-requests' ...
| * dt-bindings: clock: r9a06g032-sysctrl: Reference the DMAMUX subnodeMiquel Raynal2022-05-191-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This system controller contains several registers that have nothing to do with the clock handling, like the DMA mux register. Describe this part of the system controller as a subnode. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220427095653.91804-3-miquel.raynal@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | Merge tag 'clk-for-linus' of ↵Linus Torvalds2022-05-2730-773/+1061
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Mainly driver updates this time around. There's a single patch to the core clk framework that simplifies a runtime PM call. Otherwise the majority of the diff falls to a few SoC drivers: Qualcomm, STM32 and MediaTek. Those SoCs gain some new hardware support and what comes along with that is quite a few lines of data and some clk_ops code. Beyond the new hardware support we have the usual pile of driver updates that add missing clks on already supported SoCs or fix up problems like bad clk tree descriptions. It's nice to see that more drivers are moving to clk_hw based APIs too. New Drivers: - Add STM32MP13 RCC driver (Reset Clock Controller) - MediaTek MT8186 SoC clk support - Airoha EN7523 SoC system clocks - Clock driver for exynosautov9 SoC - Renesas R-Car V4H and RZ/V2M SoCs - Renesas RZ/G2UL SoC - LPASS clk driver for Qualcomm sc7280 SoC - GCC clk driver for Qualcomm SC8280XP SoC Updates: - SDCC uses floor clk ops on Qualcomm MSM8976 - Add modem reset and fix RPM clks on Qualcomm MSM8976 - Add the two missing CLKOUT clocks for U8500/DB8500 SoC - Mark some clks critical on Ingenic X1000 - Convert ux500 to clk_hw - Move MediaTek driver to clk_hw provider APIs - Use i2c driver probe_new to avoid id scans - Convert a number of Rockchip dt bindings to YAML - Mark hclk_vo critical on Rockchip rk3568 - Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage - Various cleanups like memory allocation error checks and plugged leaks - Allwinner H6 RTC clock support - Allwinner H616 32 kHz clock support - Add the Universal Flash Storage clock on Renesas R-Car S4-8 - Add I2C, SSIF-2 (sound), USB, CANFD, OSTM (timer), WDT, SPI Multi I/O Bus, RSPI, TSU (thermal), and ADC clocks and resets on Renesas RZ/G2UL - Add display clock support on Renesas RZ/G2L - Add RPC (QSPI/HyperFlash) clocks on Renesas R-Car E3 and D3 - Add 27 MHz phy PLL ref clock on i.MX - Add mcore_booted module parameter to tell kernel M core has already booted for i.MX - Remove snvs clock on i.MX because it was for secure world only - Add dt bindings for i.MX8MN GPT - Add DISP2 pixel clock for i.MX8MP - Add clkout1/2 for i.MX8MP - Fix parent clock of ubs_root_clk for i.MX8MP - Implement better RCG parking on Qualcomm SoCs using the shared RCG clk ops - Kerneldoc fixes - Switch Tegra BPMP to determine_rate clk op - Add a pointer to dt schema for generic clock bindings" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (168 commits) Revert "clk: qcom: regmap-mux: add pipe clk implementation" Revert "clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks" Revert "clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks" clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc() clk: stm32mp13: add safe mux management clk: stm32mp13: add multi mux function clk: stm32mp13: add all STM32MP13 kernel clocks clk: stm32mp13: add all STM32MP13 peripheral clocks clk: stm32mp13: manage secured clocks clk: stm32mp13: add composite clock clk: stm32mp13: add stm32 divider clock clk: stm32mp13: add stm32_gate management clk: stm32mp13: add stm32_mux clock management clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller) dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC clk: ti: clkctrl: replace usage of found with dedicated list iterator variable clk: ti: composite: Prefer kcalloc over open coded arithmetic dt-bindings: clock: exynosautov9: correct count of NR_CLK clk: mediatek: mt8173: Switch to clk_hw provider APIs clk: mediatek: Switch to clk_hw provider APIs ...
| * \ Merge branch 'clk-qcom' into clk-nextStephen Boyd2022-05-256-66/+418
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * clk-qcom: Revert "clk: qcom: regmap-mux: add pipe clk implementation" Revert "clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks" Revert "clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks" clk: qcom: rcg2: Cache CFG register updates for parked RCGs clk: qcom: add sc8280xp GCC driver dt-bindings: clock: Add Qualcomm SC8280XP GCC bindings clk: qcom: gcc-msm8976: Add modem reset dt-bindings: clk: qcom: gcc-msm8976: Add modem reset clk: qcom: gcc-msm8976: Set floor ops for SDCC dt-bindings: clock: qcom,gcc-apq8064: Fix typo in compatible and split apq8084 clk: qcom: smd: Update MSM8976 RPM clocks. clk: qcom: gcc-msm8998: add SSC-related clocks dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocks dt-bindings: clock: qcom,rpmcc: add clocks property dt-bindings: clock: qcom,rpmcc: convert to dtschema clk: qcom: lpass: Add support for LPASS clock controller for SC7280 dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280 clk: qcom: gcc-sc7280: use new clk_regmap_mux_safe_ops for PCIe pipe clocks clk: qcom: gcc-sm8450: use new clk_regmap_mux_safe_ops for PCIe pipe clocks clk: qcom: regmap-mux: add pipe clk implementation
| | * | dt-bindings: clock: Add Qualcomm SC8280XP GCC bindingsBjorn Andersson2022-05-191-0/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add binding for the Qualcomm SC8280XP Global Clock controller. The clock-names property is purposefully omitted, to clearly communicate to the writer (and reader) of the DeviceTree source based on this binding that the order of "clocks" is significant, in contrast to previous GCC bindings. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220505025457.1693716-2-bjorn.andersson@linaro.org
| | * | dt-bindings: clock: qcom,gcc-apq8064: Fix typo in compatible and split apq8084Krzysztof Kozlowski2022-05-052-3/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The qcom,gcc-apq8064.yaml was meant to describe only APQ8064 and APQ8084 should have slightly different bindings (without Qualcomm thermal sensor device). Add new bindings for APQ8084. Fixes: a469bf89a009 ("dt-bindings: clock: simplify qcom,gcc-apq8064 Documentation") Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220426064241.6379-1-krzysztof.kozlowski@linaro.org
| | * | dt-bindings: clock: qcom,rpmcc: add clocks propertyKrzysztof Kozlowski2022-04-121-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RPM clock controller receive input clock ("xo"). It is modelled on only one chip - MSM8953. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-11-krzysztof.kozlowski@linaro.org
| | * | dt-bindings: clock: qcom,rpmcc: convert to dtschemaKrzysztof Kozlowski2022-04-122-63/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the Qualcomm RPM Clock Controller bindings to DT schema and include it in parent's schema (SMD RPM). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-10-krzysztof.kozlowski@linaro.org
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| *-------. \ \ Merge branches 'clk-rockchip', 'clk-ingenic', 'clk-bindings', 'clk-samsung' ↵Stephen Boyd2022-05-2521-699/+905
| |\ \ \ \ \ \ \ | | | | |_|_|_|/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and 'clk-stm' into clk-next - Mark some clks critical on Ingenic X1000 - Add STM32MP13 RCC driver (Reset Clock Controller) * clk-rockchip: dt-bindings: clock: convert rockchip,rk3368-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3228-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3036-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3308-cru.txt to YAML dt-bindings: clock: convert rockchip,px30-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3188-cru.txt to YAML dt-bindings: clock: convert rockchip,rk3288-cru.txt to YAML dt-bindings: clock: convert rockchip,rv1108-cru.txt to YAML dt-binding: clock: Add missing rk3568 cru bindings clk: rockchip: Mark hclk_vo as critical on rk3568 dt-bindings: clock: fix rk3399 cru clock issues dt-bindings: clock: use generic node name for pmucru example in rockchip,rk3399-cru.yaml dt-bindings: clock: replace a maintainer for rockchip,rk3399-cru.yaml dt-bindings: clock: fix some conversion style issues for rockchip,rk3399-cru.yaml * clk-ingenic: clk: ingenic-tcu: Fix missing TCU clock for X1000 SoCs mips: ingenic: Do not manually reference the CPU clock clk: ingenic: Mark critical clocks in Ingenic SoCs clk: ingenic: Allow specifying common clock flags * clk-bindings: dt-bindings: clock: Replace common binding with link to schema * clk-samsung: dt-bindings: clock: exynosautov9: correct count of NR_CLK clk: samsung: exynosautov9: add cmu_peric1 clock support clk: samsung: exynosautov9: add cmu_peric0 clock support clk: samsung: exynosautov9: add cmu_fsys2 clock support clk: samsung: exynosautov9: add cmu_busmc clock support clk: samsung: exynosautov9: add cmu_peris clock support clk: samsung: exynosautov9: add cmu_core clock support clk: samsung: add top clock support for Exynos Auto v9 SoC dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings dt-bindings: clock: add clock binding definitions for Exynos Auto v9 * clk-stm: clk: stm32mp13: add safe mux management clk: stm32mp13: add multi mux function clk: stm32mp13: add all STM32MP13 kernel clocks clk: stm32mp13: add all STM32MP13 peripheral clocks clk: stm32mp13: manage secured clocks clk: stm32mp13: add composite clock clk: stm32mp13: add stm32 divider clock clk: stm32mp13: add stm32_gate management clk: stm32mp13: add stm32_mux clock management clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller) dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC
| | | | | | * | dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoCGabriel Fernandez2022-05-201-0/+2
| | | | |_|/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New compatible to manage clock and reset of STM32MP13 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Link: https://lore.kernel.org/r/20220516070600.7692-2-gabriel.fernandez@foss.st.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | | | * | | dt-bindings: clock: Replace common binding with link to schemaRob Herring2022-05-191-186/+2
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The contents of the clock binding have been moved to the clock binding schema in the dtschema repository. The desire is for common bindings to be hosted in the dtschema repository. Replace the contents with a link to the clock binding schema as there are still many references to clock-bindings.txt in the tree. This will prevent additions without a schema. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220428154154.2284317-1-robh@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | | dt-bindings: clock: convert rockchip,rk3368-cru.txt to YAMLJohan Jonker2022-05-172-61/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert rockchip,rk3368-cru.txt to YAML. Changes against original bindings: - Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329180550.31043-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: convert rockchip,rk3228-cru.txt to YAMLJohan Jonker2022-05-172-58/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert rockchip,rk3228-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220330121923.24240-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: convert rockchip,rk3036-cru.txt to YAMLJohan Jonker2022-05-172-56/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert rockchip,rk3036-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220330114847.18633-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: convert rockchip,rk3308-cru.txt to YAMLJohan Jonker2022-05-172-60/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert rockchip,rk3308-cru.txt to YAML. Changes against original bindings: - Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329184339.1134-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: convert rockchip,px30-cru.txt to YAMLJohan Jonker2022-05-172-70/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert rockchip,px30-cru.txt to YAML. Changes against original bindings: Use compatible string: "rockchip,px30-pmucru" Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220330103923.11063-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: convert rockchip,rk3188-cru.txt to YAMLJohan Jonker2022-05-172-61/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current dts files with RK3188/RK3066 'cru' nodes are manually verified. In order to automate this process rockchip,rk3188-cru.txt has to be converted to YAML. Changed: Add properties to fix notifications by clocks.yaml for example: clocks clock-names Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329111323.3569-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: convert rockchip,rk3288-cru.txt to YAMLJohan Jonker2022-05-172-67/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current dts files with RK3288 'cru' nodes are manually verified. In order to automate this process rockchip,rk3288-cru.txt has to be converted to YAML. Changed: Add properties to fix notifications by clocks.yaml for example: clocks clock-names Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329113657.4567-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: convert rockchip,rv1108-cru.txt to YAMLJohan Jonker2022-05-152-59/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert rockchip,rv1108-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220330131608.30040-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-binding: clock: Add missing rk3568 cru bindingsPeter Geis2022-05-141-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rk3568 cru requires a clock input and a phandle to the grf node. Add these bindings to clear some dtbs_check warnings. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220511150117.113070-2-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: fix rk3399 cru clock issuesJohan Jonker2022-04-101-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current rk3399 cru DT node gives warnings like: 'clocks' is a dependency of 'assigned-clocks'. With the YAML conversion somehow "assigned-xxx" properties where added. If a proper clock is added to the cru node these properties are no longer needed, so removed them. Currently only one clock will be added, so limit the clock maxItems to 1. Add a clock name to be able to differentiate and filter bogus entries. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329150742.22093-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: use generic node name for pmucru example in ↵Johan Jonker2022-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rockchip,rk3399-cru.yaml The node names should be generic, so fix this for the pmucru node example in the rockchip,rk3399-cru.yaml file and rename it to "clock-controller". Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329150742.22093-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: replace a maintainer for rockchip,rk3399-cru.yamlJohan Jonker2022-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the rk3399 cru YAML conversion the original text author was somehow added as a maintainer, but who's currently no longer involved on the subject. Replace this position with the Rockchip clock maintainer on her request. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329150742.22093-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | dt-bindings: clock: fix some conversion style issues for ↵Johan Jonker2022-04-101-7/+7
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rockchip,rk3399-cru.yaml With the conversion of rockchip,rk3399-cru.txt a table with external clocks was copied. Make it a bit cleaner by aligning the columns. Also fix a description. Phrases start with a capital. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329150742.22093-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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| *-. | | | Merge branches 'clk-ux500', 'clk-mtk', 'clk-tegra', 'clk-allwinner' and ↵Stephen Boyd2022-05-251-0/+57
| |\ \| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-imx' into clk-next - Convert ux500 to clk_hw - Add the two missing CLKOUT clocks for U8500/DB8500 SoC - MediaTek MT8186 SoC clk support - Move MediaTek driver to clk_hw provider APIs * clk-ux500: clk: ux500: fix a possible off-by-one in u8500_prcc_reset_base() clk: ux500: Implement the missing CLKOUT clocks clk: ux500: Rewrite PRCMU clocks to use clk_hw_* clk: ux500: Drop .is_prepared state from PRCMU clocks clk: ux500: Drop .is_enabled state from PRCMU clocks dt-bindings: clock: u8500: Add clkout clock bindings * clk-mtk: (22 commits) clk: mediatek: mt8173: Switch to clk_hw provider APIs clk: mediatek: Switch to clk_hw provider APIs clk: mediatek: Replace 'struct clk' with 'struct clk_hw' clk: mediatek: apmixed: Drop error message from clk_register() failure clk: mediatek: Make mtk_clk_register_composite() static clk: mediatek: use en_mask as a pure div_en_mask clk: mediatek: update compatible string for MT7986 ethsys clk: mediatek: Add MT8186 ipesys clock support clk: mediatek: Add MT8186 mdpsys clock support clk: mediatek: Add MT8186 camsys clock support clk: mediatek: Add MT8186 vencsys clock support clk: mediatek: Add MT8186 vdecsys clock support clk: mediatek: Add MT8186 imgsys clock support clk: mediatek: Add MT8186 wpesys clock support clk: mediatek: Add MT8186 mmsys clock support clk: mediatek: Add MT8186 mfgsys clock support clk: mediatek: Add MT8186 imp i2c wrapper clock support clk: mediatek: Add MT8186 apmixedsys clock support clk: mediatek: Add MT8186 infrastructure clock support clk: mediatek: Add MT8186 topckgen clock support ... * clk-tegra: clk: tegra: Update kerneldoc to match prototypes clk: tegra: Replace .round_rate() with .determine_rate() clk: tegra: Register clocks from root to leaf clk: tegra: Add missing reset deassertion * clk-allwinner: clk: sunxi-ng: h616: Add PLL derived 32KHz clock clk: sunxi-ng: h6-r: Add RTC gate clock * clk-imx: clk: imx8mp: fix usb_root_clk parent clk: imx8mp: add clkout1/2 support clk: imx: scu: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() usage clk: imx8mp: Add DISP2 pixel clock clk: imx: scu: fix a potential memory leak in __imx_clk_gpr_scu() clk: imx: Add check for kcalloc clk: imx8mn: add GPT support dt-bindings: imx: add clock bindings for i.MX8MN GPT clk: imx: Remove the snvs clock clk: imx8m: check mcore_booted before register clk clk: imx: add mcore_booted module paratemter clk: imx8mq: add 27m phy pll ref clock
| | * | | | dt-bindings: clock: u8500: Add clkout clock bindingsLinus Walleij2022-04-251-0/+57
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds device tree bindings for the externally routed clocks CLKOUT1 and CLKOUT2 clocks found in the DB8500. Cc: devicetree@vger.kernel.org Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220414221751.323525-2-linus.walleij@linaro.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *---. \ \ \ Merge branches 'clk-ti', 'clk-cleanup', 'clk-airoha', 'clk-i2c-simple' and ↵Stephen Boyd2022-05-253-8/+71
| |\ \ \ \ \ \ | | | |_|/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-renesas' into clk-next - Airoha EN7523 SoC system clocks - Use i2c driver probe_new to avoid id scans * clk-ti: clk: ti: clkctrl: replace usage of found with dedicated list iterator variable clk: ti: composite: Prefer kcalloc over open coded arithmetic clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk dt-bindings: clock: ehrpwm: Add AM62 specific compatible * clk-cleanup: clk: bcm: rpi: Use correct order for the parameters of devm_kcalloc() clk: fixed-rate: Remove redundant if statement clk: mux: remove redundant initialization of variable width clk: using pm_runtime_resume_and_get instead of pm_runtime_get_sync clk: actions: remove redundant assignment after a mask operation * clk-airoha: clk: en7523: fix wrong pointer check in en7523_clk_probe() clk: en7523: Add clock driver for Airoha EN7523 SoC dt-bindings: Add en7523-scu device tree binding documentation * clk-i2c-simple: clk: renesas-pcie: use simple i2c probe function clk: si570: use i2c_match_id and simple i2c probe clk: si544: use i2c_match_id and simple i2c probe clk: si5351: use i2c_match_id and simple i2c probe clk: si5341: use simple i2c probe function clk: si514: use simple i2c probe function clk: max9485: use simple i2c probe function clk: cs2000-cp: use simple i2c probe function clk: cdce925: use i2c_match_id and simple i2c probe clk: cdce706: use simple i2c probe function * clk-renesas: (48 commits) clk: renesas: r9a09g011: Add eth clock and reset entries clk: renesas: Add RZ/V2M support using the rzg2l driver clk: renesas: rzg2l: Add support for RZ/V2M reset monitor reg clk: renesas: rzg2l: Make use of CLK_MON registers optional clk: renesas: rzg2l: Set HIWORD mask for all mux and dividers clk: renesas: rzg2l: Add read only versions of the clk macros clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macro dt-bindings: clock: renesas,rzg2l: Document RZ/V2M SoC clk: renesas: r9a07g044: Fix OSTM1 module clock name clk: renesas: r9a07g043: Add clock and reset entries for ADC clk: renesas: r9a07g043: Add TSU clock and reset entry clk: renesas: r9a07g043: Add RSPI clock and reset entries clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Controller clk: renesas: r9a07g044: Add DSI clock and reset entries clk: renesas: r9a07g044: Add LCDC clock and reset entries clk: renesas: r9a07g044: Add M4 Clock support clk: renesas: r9a07g044: Add M3 Clock support clk: renesas: r9a07g044: Add {M2, M2_DIV2} Clocks support clk: renesas: r9a07g044: Add M1 clock support clk: renesas: rzg2l: Add DSI divider clk support ...
| | | | * | | dt-bindings: clock: renesas,rzg2l: Document RZ/V2M SoCPhil Edworthy2022-05-051-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the device tree binding for the Renesas RZ/V2M (r9a09g011) SoC. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20220503115557.53370-4-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | | | * | | dt-bindings: clock: renesas,cpg-mssr: Document r8a779g0Yoshihiro Shimoda2022-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add binding documentation for the R-Car V4H (R8A779G0) Clock Pulse Generator. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220420084255.375700-7-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | | | * | | dt-bindings: clock: renesas: Document RZ/G2UL SoCBiju Das2022-04-041-3/+4
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the device tree binding for the Renesas RZ/G2UL Type-1 and Type-2 SoC. RZ/G2UL Type-2 has fewer clocks than RZ/G2UL Type-1 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220315142915.17764-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | | * | | dt-bindings: Add en7523-scu device tree binding documentationJohn Crispin2022-04-221-0/+58
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds device tree binding documentation for clocks in the EN7523 SOC. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Felix Fietkau <nbd@nbd.name> Link: https://lore.kernel.org/r/20220314084409.84394-2-nbd@nbd.name Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * / / / dt-bindings: clock: ehrpwm: Add AM62 specific compatibleGeorgi Vlaev2022-04-221-0/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce AM62 specific compatible for EPWM time-base sub-module clock. The time-base clock setup is identical to AM64. The only difference is AM62 provides 3 time-base clocks instead of the 9 found in AM64. Signed-off-by: Georgi Vlaev <g-vlaev@ti.com> Tested-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220415190343.6284-2-g-vlaev@ti.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* | | | Merge tag 'asm-generic-5.19' of ↵Linus Torvalds2022-05-262-47/+0
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "The asm-generic tree contains three separate changes for linux-5.19: - The h8300 architecture is retired after it has been effectively unmaintained for a number of years. This is the last architecture we supported that has no MMU implementation, but there are still a few architectures (arm, m68k, riscv, sh and xtensa) that support CPUs with and without an MMU. - A series to add a generic ticket spinlock that can be shared by most architectures with a working cmpxchg or ll/sc type atomic, including the conversion of riscv, csky and openrisc. This series is also a prerequisite for the loongarch64 architecture port that will come as a separate pull request. - A cleanup of some exported uapi header files to ensure they can be included from user space without relying on other kernel headers" * tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: h8300: remove stale bindings and symlink sparc: add asm/stat.h to UAPI compile-test coverage powerpc: add asm/stat.h to UAPI compile-test coverage mips: add asm/stat.h to UAPI compile-test coverage riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage kbuild: prevent exported headers from including <stdlib.h>, <stdbool.h> agpgart.h: do not include <stdlib.h> from exported header csky: Move to generic ticket-spinlock RISC-V: Move to queued RW locks RISC-V: Move to generic spinlocks openrisc: Move to ticket-spinlock asm-generic: qrwlock: Document the spinlock fairness requirements asm-generic: qspinlock: Indicate the use of mixed-size atomics asm-generic: ticket-lock: New generic ticket-based spinlock remove the h8300 architecture
| * | | | h8300: remove stale bindings and symlinkArnd Bergmann2022-05-201-23/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These four files are left over from the h8300 removal. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | Merge branch 'remove-h8300' of git://git.infradead.org/users/hch/misc into ↵Arnd Bergmann2022-04-041-24/+0
| |\ \ \ \ | | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | asm-generic * 'remove-h8300' of git://git.infradead.org/users/hch/misc: remove the h8300 architecture This is clearly the least actively maintained architecture we have at the moment, and probably the least useful. It is now the only one that does not support MMUs at all, and most of the boards only support 4MB of RAM, out of which the defconfig kernel needs more than half just for .text/.data. Guenter Roeck did the original patch to remove the architecture in 2013 after it had already been obsolete for a while, and Yoshinori Sato brought it back in a much more modern form in 2015. Looking at the git history since the reinstantiation, it's clear that almost all commits in the tree are build fixes or cross-architecture cleanups: $ git log --no-merges --format=%an v4.5.. arch/h8300/ | sort | uniq -c | sort -rn | head -n 12 25 Masahiro Yamada 18 Christoph Hellwig 14 Mike Rapoport 9 Arnd Bergmann 8 Mark Rutland 7 Peter Zijlstra 6 Kees Cook 6 Ingo Molnar 6 Al Viro 5 Randy Dunlap 4 Yury Norov Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | remove the h8300 architectureChristoph Hellwig2022-02-231-24/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Christoph Hellwig <hch@lst.de>
* | | | | Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2022-05-2610-1/+445
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
| * | | | | dt-bindings: clock: stm32mp1: adapt example for "st,stm32mp1-rcc-secure"Alexandre Torgue2022-05-131-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For "st,stm32mp1-rcc-secure" schema, clocks and clock-names entries are now required properties. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220511092559.4952-1-alexandre.torgue@foss.st.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | Merge tag 'qcom-arm64-for-5.19' of ↵Arnd Bergmann2022-05-091-0/+172
| |\ \ \ \ \ | | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DT updates for v5.19 This adds MDIO bus description on the IPQ6018 platform. On MSM8916 the BAM-DMUX WWAN network device is added and the Huawei Ascend G7 gains sound card definition and clarified installation instructions. MSM8992 and MSM8994 continues to be worked on, gaining multimedia clock controller, on-chip memory, watchdog and various cleanup changes. The Xiaomi Mi 4C gains CPU regulators and fixes to the framebuffer definition, while Huawei Nexus 6P gains eMMC support. On MSM8996 the modem and sensor remtoeprocs are added and enabled in the Dragonboard 820c and the Xiaomi devices. On MSM8998 a few newly added clocks related to the sensor subsystem bus are marked as protected by default and the OnePlus devices gains NFC. The SC7180 platform and devices thereon are further polished and limozeen moves to using edp-panel for EDID-based detection, over statically defined panels. On SC7280 GPI DMA, WiFi remoteproc and network device, LPASS audio clocks, resets for SDCC controllers and a new CRD revision are added. A supply glitch on the PCIe power and a current leak for Bluetooth during suspend are corrected. The Herobrine board gains eDP support and the IDP gains backlight. USB is marked wakeup capable. On SDM845 the IPA, WLED based backlight and second WiFi channel are enabled for Xiaomi Pocophone F1, the firmware name is modified to not conflict with other boards. On RB3 the CAN bus controller is added and the WiFi calibration variant is defined to allow adding the board's calibration information into linux-firmware. SM6350 gains I2C busses, UFS and WiFi support, and the numbering of uart9 is corrected. On SM7225 and the Fairphone 4 UFS, WiFi and haptics are enabled. On SM8150 PCIe, Ethernet and uSD card support is added, and enabled for the SA8155p ADP board. The PDC interrupt controller is also added and described as wakup interrupt parent for TLMM. Camera subsystem and control interface are defined for SM8250. On the Sony Xperia 1 II the audio amplifiers are enabled. On SM8350 GPI DMA engines are added and linked to the I2C and SPI serial engines. Surface Duo 2 gains battery charger support. On SM8450 the two PCIe controller/PHYs are enabled, GPI DMA and QUP serial engine instances are added. Remoteproc instances are enabled on SM8450 HDK. Last, but not least, a number of DeviceTree validation errors across various boards are corrected. * tag 'qcom-arm64-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (150 commits) arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi arm64: dts: qcom: sc7180-trogdor: Simplify spi0/spi6 labeling arm64: dts: qcom: sc7180-trogdor: Simplify trackpad enabling arm64: dts: qcom: sc7280: eDP for herobrine boards arm64: dts: qcom: sa8155p-adp: Disable multiple Tx and Rx queues for ethernet IP arm64: dts: qcom: sm8150: Fix iommu sid value for SDC2 controller arm64: dts: qcom: sm8350-duo2: enable battery charger arm64: dts: qcom: Enable pm8350c pwm for sc7280-idp2 arm64: dts: qcom: pm8350c: Add pwm support arm64: dts: qcom: sc7280-qcard: Configure CTS pin to bias-bus-hold for bluetooth arm64: dts: qcom: sc7280-idp: Configure CTS pin to bias-bus-hold for bluetooth arm64: dts: qcom: sc7180: Remove ipa interconnect node arm64: dts: qcom: sc7280-idp: Enable GPI DMAs arm64: dts: qcom: sc7280: Add GENI I2C/SPI DMA channels arm64: dts: qcom: sc7280: Add GPI DMAengines arm64: dts: qcom: sm8450: Fix qmp phy node (use phy@ instead of lanes@) arm64: dts: qcom: db845c: Add support for MCP2517FD arm64: dts: qcom: qrb5165-rb5: Fix can-clock node name arm64: dts: qcom: sc7280: Add SAR sensors to herobrine crd arm64: dts: qcom: sm8250: camss: Add CCI definitions ... Link: https://lore.kernel.org/r/20220509204451.325675-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280Taniya Das2022-04-121-0/+172
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic properties that are needed in a device tree. Also add clock ids for LPASS core clocks and audio clock IDs for LPASS client to request for the clocks. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220223172248.18877-1-tdas@codeaurora.org
| * | | | Merge tag 'samsung-dt64-5.19-2' of ↵Arnd Bergmann2022-05-061-0/+219
| |\ \ \ \ | | | |_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.19, part two 1. Cleanups: unused and undocumented dma-channels and dma-requests. 2. Add clock controllers to ExynosAutov9. * tag 'samsung-dt64-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: switch UFS clock node in ExynosAutov9 arm64: dts: exynos: switch USI clocks in ExynosAutov9 arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9 dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings dt-bindings: clock: add clock binding definitions for Exynos Auto v9 arm64: dts: fsd: drop useless 'dma-channels/requests' properties arm64: dts: exynos: drop useless 'dma-channels/requests' properties arm64: dts: exynos: move XTCXO clock frequency to board in Exynos Auto v9 Link: https://lore.kernel.org/r/20220506081438.149192-5-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | dt-bindings: clock: add Exynos Auto v9 SoC CMU bindingsChanho Park2022-05-051-0/+219
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dt-schema for Exynos Auto v9 SoC clock controller. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504075154.58819-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| * | | Merge tag 'stm32-dt-for-v5.19-1' of ↵Arnd Bergmann2022-05-051-0/+34
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT for v5.19, round 1 Highlights: ---------- -MCU: -Fix pinctrl node names to match with pinctrl yaml. - MPU: -General: - Fix pinctrl node names to match with pinctrl yaml. - Add Protonics boards support based on STM32MP151A SoC: - PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with TI and Micrel 10BaseT Phys and wifi support. - PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity and CO2 sensors. - PRTT1A - 10BaseT1L multi functional controller. - ST boards: - Add RTC support on stm32mp13. - Add button and heartbit support on stm32mp13 DK board. - Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based on OP-TEE OS and SCMI protocol. - DH boards: - Use MCO2 to generate PHY clock and ETHRX clock in order to release internal PLL for a better SD card usage. - Add 1ms PHY post-reset on Avenger96 board to match with PHY requirements. * tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits) ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 dt-bindings: reset: stm32mp15: rename RST_SCMI define dt-bindings: clock: stm32mp15: rename CK_SCMI define dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure" dt-bindings: rcc: Add optional external ethernet RX clock properties ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131 ARM: dts: stm32: add support for Protonic PRTT1x boards ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards dt-bindings: arm: stm32: correct blank lines dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards ARM: dts: stm32: enable RTC support on stm32mp135f-dk ARM: dts: stm32: add RTC node on stm32mp131 ARM: dts: stm32: Fix PHY post-reset delay on Avenger96 ARM: dts: stm32: fix pinctrl node name warnings (MPU soc) ... Link: https://lore.kernel.org/r/5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"Alexandre Torgue2022-05-041-8/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of "st,stm32mp1-rcc-secure" (stm32mp1 clock driver with RCC security support hardened), "clocks" and "clock-names" describe oscillators and are required. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org>
| | * | | dt-bindings: rcc: Add optional external ethernet RX clock propertiesMarek Vasut2022-05-041-0/+8
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Describe optional external ethernet RX clock in the DT binding to fix dtbs_check warnings like: arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dt.yaml: rcc@50000000: 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks', 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Rob Herring <robh+dt@kernel.org> To: devicetree@vger.kernel.org Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220410220514.21779-1-marex@denx.de Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
| * | | dt-bindings: clock: ti: Add clock-output-names for TI composite clocksTony Lindgren2022-04-116-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the TI composite clocks, we currently have only the divider clock list clock-output-names as an optional devicetree property. Let's add clock-output-names for all the TI composite clock bindings. This allows us to use clock-output-names for the clockctrl instance name instead of relying on a custom compatible or non-standard node names. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Message-Id: <20220203112337.19821-3-tony@atomide.com>
| * | | dt-bindings: clock: ti: Add clock-output-names for clockctrlTony Lindgren2022-04-111-1/+3
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows us to use clock-output-names for the clockctrl instance name instead of relying on a custom compatible or non-standard node names. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Message-Id: <20220203112337.19821-2-tony@atomide.com>
* | | Merge tag 'devicetree-for-5.19' of ↵Linus Torvalds2022-05-253-1/+122
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "Bindings: - Convert smsc,lan91c111, qcom,spi-qup, qcom,msm-uartdm, qcom,i2c-qup, qcom,gsbi, i2c-mt65xx, TI wkup_m3_ipc (and new props), qcom,smp2p, TI timer, Mediatek gnss, Mediatek topckgen, Mediatek apmixedsys, Mediatek infracfg, fsl,ls-extirq, fsl,layerscape-dcfg, QCom PMIC SPMI, rda,8810pl-timer, Xilinx zynqmp_ipi, uniphier-pcie, and Ilitek touchscreen controllers - Convert various Arm Ltd peripheral IP bindings to schemas - New bindings for Menlo board CPLD, DH electronics board CPLD, Qualcomm Geni based QUP I2C, Renesas RZ/G2UL OSTM, Broafcom BCM4751 GNSS, MT6360 PMIC, ASIX USB Ethernet controllers, and Microchip/SMSC LAN95xx USB Ethernet controllers - Add vendor prefix for Enclustra - Add various compatible string additions - Various example fixes and cleanups - Remove unused hisilicon,hi6220-reset binding - Treewide fix properties missing type definition - Drop some empty and unreferenced .txt bindings - Documentation improvements for writing schemas DT driver core: - Drop static IRQ resources for DT platform devices as IRQ setup is dynamic and drivers have all been converted to use platform_get_irq() and friends - Rework memory allocations and frees for overlays - Continue overlay notifier callbacks on successful calls and add unittests - Handle 'interrupts-extended' in early DT IRQ setup - Fix of_property_read_string() errors to match documentation - Ignore disabled nodes in FDT API calls" * tag 'devicetree-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (86 commits) of/irq: fix typo in comment dt-bindings: Fix properties without any type Revert "dt-bindings: mailbox: qcom-ipcc: add missing properties into example" dt-bindings: input: touchscreen: ilitek_ts_i2c: Absorb ili2xxx bindings dt-bindings: timer: samsung,exynos4210-mct: define strict clock order dt-bindings: timer: samsung,exynos4210-mct: drop unneeded minItems dt-bindings: timer: cdns,ttc: drop unneeded minItems dt-bindings: mailbox: zynqmp_ipi: convert to yaml dt-bindings: usb: ci-hdrc-usb2: fix node node for ethernet controller dt-bindings: net: add schema for Microchip/SMSC LAN95xx USB Ethernet controllers dt-bindings: net: add schema for ASIX USB Ethernet controllers of/fdt: Ignore disabled memory nodes dt-bindings: arm: fix typos in compatible dt-bindings: mfd: Add bindings child nodes for the Mediatek MT6360 dt-bindings: display: convert Arm Komeda to DT schema dt-bindings: display: convert Arm Mali-DP to DT schema dt-bindings: display: convert Arm HDLCD to DT schema dt-bindings: display: convert PL110/PL111 to DT schema dt-bindings: arm: convert vexpress-config to DT schema dt-bindings: arm: convert vexpress-sysregs to DT schema ...
generated by cgit v1.2.3-71-gd317 (git 2.46.0) at 2026-01-12 00:08:21 +0000