| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | dt-bindings: net: phy: Add 10-baseT1L 2.4 Vpp | Alexandru Tachici | 2022-05-01 | 1 | -0/+9 |
| * | dt-bindings: net: Reintroduce PHY no lane swap binding | Alexander Stein | 2021-12-06 | 1 | -0/+8 |
| * | dt-bindings: Fix JSON pointers | Rob Herring | 2020-12-18 | 1 | -10/+10 |
| * | dt-bindings: Explicitly allow additional properties in common schemas | Rob Herring | 2020-10-07 | 1 | -0/+2 |
| * | dt-bindings: net: Add tx and rx internal delays | Dan Murphy | 2020-06-25 | 1 | -0/+12 |
| * | dt-bindings: net: Correct description of 'broken-turn-around' | Florian Fainelli | 2020-04-22 | 1 | -1/+2 |
| * | dt-bindings: net: ethernet-phy: add desciption for ethernet-phy-id1234.d400 | Johan Jonker | 2020-04-15 | 1 | -0/+3 |
| * | dt-bindings: net: add ethernet controller and phy sfp property | Russell King | 2019-11-18 | 1 | -0/+5 |
| * | dt-bindings: net: phy: The interrupt property is not mandatory | Maxime Ripard | 2019-06-28 | 1 | -1/+0 |
| * | dt-bindings: net: Add a YAML schemas for the generic PHY options | Maxime Ripard | 2019-06-28 | 1 | -0/+178 |
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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