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* Merge tag 'qcom-arm64-fixes-for-5.19' of ↵Arnd Bergmann2022-07-037-9/+19
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm ARM64 DT fixes for v5.19 This removes duplicate includes in the sc7180-trogdor files, which accidentally ended up disabling nodes intended to be enabled. It corrects identifiers for CPU6/7 on MSM8994. On SM8450 the UFS node's interconnects property is updated to match the #interconnect-cells, avoiding sync_state issues and the GIC ITS is defined, to correct the references from the PCIe nodes. On SDM845 the display subsystem's AHB clock is corrected and on msm8992 devices, the supplies for lvs 1 and 2 are correctly specified. Lastly, a welcome addition of Konrad as reviewer for the Qualcomm SoC. * tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo MAINTAINERS: Add myself as a reviewer for Qualcomm ARM/64 support arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node arm64: dts: qcom: sm8450 add ITS device tree node arm64: dts: qcom: msm8994: Fix CPU6/7 reg values arm64: dts: qcom: sm8450: fix interconnects property of UFS node arm64: dts: qcom: Remove duplicate sc7180-trogdor include on lazor/homestar Link: https://lore.kernel.org/r/20220703030208.408109-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typoStephan Gerhold2022-06-272-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "make dtbs_check" complains about the missing "-supply" suffix for vdd_lvs1_2 which is clearly a typo, originally introduced in the msm8994-smd-rpm.dtsi file and apparently later copied to msm8992-xiaomi-libra.dts: msm8992-lg-bullhead-rev-10/101.dtb: pm8994-regulators: 'vdd_lvs1_2' does not match any of the regexes: '.*-supply$', '^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$', 'pinctrl-[0-9]+' From schema: regulator/qcom,smd-rpm-regulator.yaml msm8992-xiaomi-libra.dtb: pm8994-regulators: 'vdd_lvs1_2' does not match any of the regexes: '.*-supply$', '^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$', 'pinctrl-[0-9]+' From schema: regulator/qcom,smd-rpm-regulator.yaml Reported-by: Rob Herring <robh@kernel.org> Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Fixes: f3b2c99e73be ("arm64: dts: Enable onboard SDHCI on msm8992") Fixes: 0f5cdb31e850 ("arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree") Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627135938.2901871-1-stephan.gerhold@kernkonzept.com
| * arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss nodeDmitry Baryshkov2022-06-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | It was noticed that on sdm845 after an MDSS suspend/resume cycle the driver can not read HW_REV registers properly (they will return 0 instead). Chaning the "iface" clock from <&gcc GCC_DISP_AHB_CLK> to <&dispcc DISP_CC_MDSS_AHB_CLK> fixes the issue. Fixes: 08c2a076d18f ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220531124735.1165582-1-dmitry.baryshkov@linaro.org
| * arm64: dts: qcom: sm8450 add ITS device tree nodeDmitry Baryshkov2022-06-251-0/+10
| | | | | | | | | | | | | | | | | | Add device tree node corresponding to the ITS part of GICv3. Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220502192604.272686-1-dmitry.baryshkov@linaro.org
| * arm64: dts: qcom: msm8994: Fix CPU6/7 reg valuesKonrad Dybcio2022-06-251-2/+2
| | | | | | | | | | | | | | | | | | CPU6 and CPU7 were mistakengly pointing to CPU5 reg. Fix it. Fixes: 02d8091bbca0 ("arm64: dts: qcom: msm8994: Add a proper CPU map") Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220501184016.64138-1-konrad.dybcio@somainline.org
| * arm64: dts: qcom: sm8450: fix interconnects property of UFS nodeVladimir Zapolskiy2022-06-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | All interconnect device tree nodes on sm8450 are 2-cells, however in UFS node they are handled as 1-cells, fix it. Fixes: aa2d0bf04a3c ("arm64: dts: qcom: sm8450: add interconnect nodes") Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220310221934.1560729-1-vladimir.zapolskiy@linaro.org
| * arm64: dts: qcom: Remove duplicate sc7180-trogdor include on lazor/homestarStephen Boyd2022-06-202-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sc7180-trogdor-{lazor,homestar}-*.dtsi files all include sc7180-trogdor.dtsi and sc7180-trogdor-lazor.dtsi or sc7180-trogdor-homestar.dtsi, so including it here in the sc7180-trogdor-{lazor,homestar}.dtsi file means we have a duplicate include after commit 19794489fa24 ("arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi"). We include the sc7180-trogdor.dtsi file in a board like sc7180-trogdor-lazor-r1.dts so that we can include the display bridge snippet (e.g. sc7180-trogdor-ti-sn65dsi86.dtsi) instead of making ever increasing variants like sc7180-trogdor-lazor-ti-sn65dsi86.dtsi. Unfortunately, having the double include like this means the display bridge's i2c bus is left disabled instead of enabled by the bridge snippet. Any boards that use the i2c bus for the display bridge will have the bus disabled when we include sc7180-trogdor.dtsi the second time, which picks up the i2c status="disabled" line from sc7180.dtsi. This leads to the display not turning on and black screens at boot on lazor and homestar devices. Fix this by dropping the include and making a note that the sc7180-trogdor-{lazor,homestar}.dtsi file must be included after sc7180-trogdor.dtsi Reported-by: Douglas Anderson <dianders@chromium.org> Cc: "Joseph S. Barrera III" <joebar@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Fixes: 19794489fa24 ("arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220602190621.1646679-1-swboyd@chromium.org
* | Merge tag 'imx-fixes-5.19-2' of ↵Arnd Bergmann2022-07-015-147/+147
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.19, round 2: - Fix the SDIO description for imx7d-smegw01 board to ensure there is no communication made at 1.8V. - Fix pgc_ispdwp power-domain clock, which should be IMX8MP_CLK_MEDIA_ISP_ROOT. - Re-enable framebuffer support in mxs_defconfig to fix a Kconfig regression. - A series from Peng Fan (and Sherry Sun) fixing various pads on i.MX8MP based boards to leave reserved bits untouched. * tag 'imx-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settings arm64: dts: imx8mp-venice-gw74xx: correct pad settings arm64: dts: imx8mp-evk: correct I2C3 pad settings arm64: dts: imx8mp-evk: correct I2C1 pad settings arm64: dts: imx8mp-evk: correct I2C5 pad settings arm64: dts: imx8mp-evk: correct vbus pad settings arm64: dts: imx8mp-evk: correct eqos pad settings arm64: dts: imx8mp-evk: correct vbus pad settings arm64: dts: imx8mp-evk: correct gpio-led pad settings arm64: dts: imx8mp-evk: correct the uart2 pinctl value arm64: dts: imx8mp-evk: correct mmc pad settings ARM: mxs_defconfig: Enable the framebuffer arm64: dts: imx8mp: correct clock of pgc_ispdwp ARM: dts: imx7d-smegw01: Fix the SDIO description Link: https://lore.kernel.org/r/20220629021244.GL819983@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settingsPeng Fan2022-06-271-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | BIT3 and BIT0 are reserved bits, should not touch. Fixes: aec8ad34f7f2 ("arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settingsPeng Fan2022-06-271-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | BIT3 and BIT0 are reserved bits, should not touch. Fixes: 88f7f6bcca37 ("arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MP") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settingsPeng Fan2022-06-271-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | BIT3 and BIT0 are reserved bits, should not touch. Fixes: 6f96852619d5 ("arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settingsPeng Fan2022-06-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | BIT3 and BIT0 are reserved bits, should not touch. Fixes: 846f752866bd ("arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-venice-gw74xx: correct pad settingsPeng Fan2022-06-271-58/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Should not set reserved bit. Fixes: 7899eb6cb15d ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct I2C3 pad settingsPeng Fan2022-06-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: 5e4a67ff7f69 ("arm64: dts: imx8mp-evk: Add i2c3 support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct I2C1 pad settingsPeng Fan2022-06-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: 5497bc2a2bff ("arm64: dts: imx8mp-evk: Add PMIC device") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct I2C5 pad settingsPeng Fan2022-06-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: 8134822db08d ("arm64: dts: imx8mp-evk: add support for I2C5") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct vbus pad settingsPeng Fan2022-06-271-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Not set reserved bit. Fixes: 9e847693c6f3 ("arm64: dts: freescale: Add i.MX8MP EVK board support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct eqos pad settingsPeng Fan2022-06-271-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Although function is not broken, we should not set reserved bit. Fixes: dc6d5dc89bad ("arm64: dts: imx8mp-evk: enable EQOS ethernet") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct vbus pad settingsPeng Fan2022-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0x19 is not a valid setting. According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Not set reserved bit. Fixes: 43da4f92a611 ("arm64: dts: imx8mp-evk: enable usb1 as host mode") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct gpio-led pad settingsPeng Fan2022-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0x19 is not a valid setting. According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Correct setting with PE PUE set, DSE set to 0. Fixes: 50d336b12f34 ("arm64: dts: imx8mp-evk: Add GPIO LED support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct the uart2 pinctl valueSherry Sun2022-06-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the IOMUXC_SW_PAD_CTL_PAD_UART2_RXD/TXD register define in imx8mp RM, bit0 and bit3 are reserved, and the uart2 rx/tx pin should enable the pull up, so need to set bit8 to 1. The original pinctl value 0x49 is incorrect and needs to be changed to 0x140, same as uart1 and uart3. Fixes: 9e847693c6f3 ("arm64: dts: freescale: Add i.MX8MP EVK board support") Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp-evk: correct mmc pad settingsPeng Fan2022-06-271-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to RM bit layout, BIT3 and BIT0 are reserved. 8 7 6 5 4 3 2 1 0 PE HYS PUE ODE FSEL X DSE X Not set reserved bit. Fixes: 9e847693c6f3 ("arm64: dts: freescale: Add i.MX8MP EVK board support") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | arm64: dts: imx8mp: correct clock of pgc_ispdwpPeng Fan2022-06-271-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | The deprecated DIV clk is previously part of the ISP composite clk, but there is still one child clk(IMX8MP_CLK_MEDIA_ISP_ROOT) sourcing from IMX8MP_CLK_MEDIA_ISP( previously IMX8MP_CLK_MEDIA_ISP_DIV) So IMX8MP_CLK_MEDIA_ISP_ROOT should be used, not IMX8MP_CLK_MEDIA_ISP_DIV. Fixes: 9d89189d5227 ("arm64: dts: imx8mp: Add MEDIAMIX power domains") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | Merge tag 'samsung-fixes-5.19' of ↵Arnd Bergmann2022-06-241-6/+6
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/fixes Samsung fixes for v5.19 Both fixes are for issues present before v5.19 merge window: 1. Correct UART clocks on Exynos7885. Although the initial, fixed DTS commit is from v5.18, the issue will be exposed with a upcoming fix to Exynos7885 clock driver, so we need to correct the DTS earlier. 2. Fix theoretical OF node leak in Exynos machine code. * tag 'samsung-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: exynos: Fix refcount leak in exynos_map_pmu arm64: dts: exynos: Correct UART clocks on Exynos7885 Link: https://lore.kernel.org/r/20220624080423.31427-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | arm64: dts: exynos: Correct UART clocks on Exynos7885David Virag2022-06-061-6/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The clocks in the serial UART nodes were swapped by mistake on Exynos7885. This only worked correctly because of a mistake in the clock driver which has been fixed. With the fixed clock driver in place, the baudrate of the UARTs get miscalculated. Fix this by correcting the clocks in the dtsi. Fixes: 06874015327b ("arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC") Signed-off-by: David Virag <virag.david003@gmail.com> Link: https://lore.kernel.org/r/20220526055840.45209-3-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
* | Merge tag 'ti-k3-dt-fixes-for-v5.19' of ↵Arnd Bergmann2022-06-242-3/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/fixes Devicetree fixes for TI K3 platforms for v5.19 Critical fixes for the following: * Boot failure on J721s2 (overlap GIC memory map) * AM64 boot fails on highspeed cards (SoC characterization updates) * tag 'ti-k3-dt-fixes-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arm64: dts: ti: k3-am64-main: Remove support for HS400 speed mode arm64: dts: ti: k3-j721s2: Fix overlapping GICD memory region Link: https://lore.kernel.org/r/20220618031627.xxvscc22c6doaa3t@kahuna Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | arm64: dts: ti: k3-am64-main: Remove support for HS400 speed modeAswath Govindraju2022-06-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM64 SoC, does not support HS400 and HS200 is the maximum supported speed mode[1]. Therefore, fix the device tree node to reflect the same. [1] - https://www.ti.com/lit/ds/symlink/am6442.pdf (SPRSP56C – JANUARY 2021 – REVISED FEBRUARY 2022) Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220512064859.32059-1-a-govindraju@ti.com
| * | arm64: dts: ti: k3-j721s2: Fix overlapping GICD memory regionMatt Ranostay2022-06-171-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GICD region was overlapping with GICR causing the latter to not map successfully, and in turn the gic-v3 driver would fail to initialize. This issue was hidden till commit 2b2cd74a06c3 ("irqchip/gic-v3: Claim iomem resources") replaced of_iomap() calls with of_io_request_and_map() that internally called request_mem_region(). Respective console output before this patchset: [ 0.000000] GICv3: /bus@100000/interrupt-controller@1800000: couldn't map region 0 Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC") Cc: linux-stable@vger.kernel.org Cc: Marc Zyngier <maz@kernel.org> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Matt Ranostay <mranostay@ti.com> Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220617151304.446607-1-mranostay@ti.com
* / arm64: s32g2: Pass unit name to soc nodeFabio Estevam2022-06-071-1/+1
|/ | | | | | | | | | | Pass unit name to soc node to fix the following W=1 build warning: arch/arm64/boot/dts/freescale/s32g2.dtsi:82.6-123.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Chester Lin <clin@suse.com> Signed-off-by: Chester Lin <clin@suse.com> Link: https://lore.kernel.org/r/20220514143505.1554813-1-festevam@gmail.com
* Merge tag 'usb-5.19-rc1' of ↵Linus Torvalds2022-06-0320-125/+239
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the "big" set of USB and Thunderbolt driver changes for 5.18-rc1. For the most part it's been a quiet development cycle for the USB core, but there are the usual "hot spots" of development activity. Included in here are: - Thunderbolt driver updates: - fixes for devices without displayport adapters - lane bonding support and improvements - other minor changes based on device testing - dwc3 gadget driver changes. It seems this driver will never be finished given that the IP core is showing up in zillions of new devices and each implementation decides to do something different with it... - uvc gadget driver updates as more devices start to use and rely on this hardware as well - usb_maxpacket() api changes to remove an unneeded and unused parameter. - usb-serial driver device id updates and small cleanups - typec cleanups and fixes based on device testing - device tree updates for usb properties - lots of other small fixes and driver updates. All of these have been in linux-next for weeks with no reported problems" * tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits) USB: new quirk for Dell Gen 2 devices usb: dwc3: core: Add error log when core soft reset failed usb: dwc3: gadget: Move null pinter check to proper place usb: hub: Simplify error and success path in port_over_current_notify usb: cdns3: allocate TX FIFO size according to composite EP number usb: dwc3: Fix ep0 handling when getting reset while doing control transfer usb: Probe EHCI, OHCI controllers asynchronously usb: isp1760: Fix out-of-bounds array access xhci: Don't defer primary roothub registration if there is only one roothub USB: serial: option: add Quectel BG95 modem USB: serial: pl2303: fix type detection for odd device xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI xhci: Remove quirk for over 10 year old evaluation hardware xhci: prevent U2 link power state if Intel tier policy prevented U1 xhci: use generic command timer for stop endpoint commands. usb: host: xhci-plat: omit shared hcd if either root hub has no ports usb: host: xhci-plat: prepare operation w/o shared hcd usb: host: xhci-plat: create shared hcd after having added main hcd xhci: prepare for operation w/o shared hcd xhci: factor out parts of xhci_gen_setup() ...
| * arm64: dts: qcom: align DWC3 USB interrupts with DT schemaKrzysztof Kozlowski2022-05-052-8/+12
| | | | | | | | | | | | | | | | | | Align order of interrupts with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-14-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * arm64: dts: qcom: align DWC3 USB clocks with DT schemaKrzysztof Kozlowski2022-05-0516-75/+143
| | | | | | | | | | | | | | | | | | Align order of clocks and their names with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-13-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * arm64: dts: qcom: msm8996: add clock-names to DWC3 USB nodeKrzysztof Kozlowski2022-05-051-0/+5
| | | | | | | | | | | | | | | | The clock-names is a required property of DWC3 USB node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-12-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatibleKrzysztof Kozlowski2022-05-051-2/+2
| | | | | | | | | | | | | | | | | | Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-11-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatibleKrzysztof Kozlowski2022-05-051-1/+1
| | | | | | | | | | | | | | | | | | Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-10-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatibleKrzysztof Kozlowski2022-05-051-1/+1
| | | | | | | | | | | | | | | | | | Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-9-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatibleKrzysztof Kozlowski2022-05-051-2/+2
| | | | | | | | | | | | | | | | | | Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-8-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * arm64: dts: qcom: correct DWC3 node names and unit addressesKrzysztof Kozlowski2022-05-0511-36/+37
| | | | | | | | | | | | | | | | | | | | Align DWC3 USB node names with DT schema ("usb" is expected) and correct the unit addresses to match the "reg" property. This also implies overriding nodes by label, instead of full path. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-7-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * Merge 5.18-rc5 into usb-nextGreg Kroah-Hartman2022-05-0318-127/+38
| |\ | | | | | | | | | | | | | | | | | | | | | We need the USB fixes in here, and this resolves a merge issue in drivers/usb/dwc3/drd.c Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | arm64: dts: qcom: sc7280: Set the default dr_mode for usb2Souradeep Chowdhury2022-04-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default dr_mode for usb2 node to "otg" to enable role-switch for EUD(Embedded USB Debugger) connector node. Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com> Link: https://lore.kernel.org/r/451392a942f90aa9805b00afad7dff894604d189.1649235218.git.quic_schowdhu@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | arm64: dts: qcom: sc7280: Add EUD dt node and dwc3 connectorSouradeep Chowdhury2022-04-211-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the Embedded USB Debugger(EUD) device tree node. The node contains EUD base register region and EUD mode manager register regions along with the interrupt entry. Also add the typec connector node for EUD which is attached to EUD node via port. EUD is also attached to DWC3 node via port. Also add the role-switch property to dwc3 node. Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com> Link: https://lore.kernel.org/r/17a6127d1f0e4e3bac023dacf60a9ba93c1e21d1.1649235218.git.quic_schowdhu@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge tag 'socfpga_dts_updates_for_v5.19' of ↵Arnd Bergmann2022-05-302-1/+68
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/late SoCFPGA dts updates for v5.19 - dtschema fix SPI NOR node - correct dt-bindings doc for Altera gpio driver - add support for n6000 Agilex platform and dt-bindings documentation * tag 'socfpga_dts_updates_for_v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: intel: add device tree for n6000 dt-bindings: intel: add binding for Intel n6000 dt-bindings: soc: add bindings for Intel HPS Copy Engine dt-bindings: gpio: altera: correct interrupt-cells ARM: dts: socfpga: align SPI NOR node name with dtschema Link: https://lore.kernel.org/r/20220519232317.16079-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | arm64: dts: intel: add device tree for n6000Matthew Gerlach2022-05-192-1/+68
| |/ / | | | | | | | | | | | | | | | | | | | | | Add a device tree for the n6000 instantiation of Agilex Hard Processor System (HPS). Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
* | | Merge tag 'v5.19-rockchip-dts64-2' of ↵Arnd Bergmann2022-05-274-4/+9
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/late Clock properties for cru nodes to match the yaml-converted bindings and renaming of Quartz-A bluetooth pin nodename to not conflict with Yaml constraints. * tag 'v5.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: rename Quartz64-A bluetooth gpios arm64: dts: rockchip: add clocks property to cru node rk3368 arm64: dts: rockchip: add clocks property to cru node rk3308 arm64: dts: rockchip: add clocks to rk356x cru Link: https://lore.kernel.org/r/7695907.Sb9uPGUboI@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | arm64: dts: rockchip: rename Quartz64-A bluetooth gpiosPeter Geis2022-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bluetooth binding for the Quartz64 Model A has incorrectly named host-wakeup and device-wakeup gpios. Rename them to clear some dtbs_check warnings. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220511150117.113070-4-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | | arm64: dts: rockchip: add clocks property to cru node rk3368Johan Jonker2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks and clock-names because the device has to have at least one input clock. Also in case someone wants to add properties that start with assign-xxx to fix warnings like: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329180550.31043-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | | arm64: dts: rockchip: add clocks property to cru node rk3308Johan Jonker2022-05-271-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks and clock-names to the rk3308 cru node, because the device has to have at least one input clock. Also in case someone wants to add properties that start with assign-xxx to fix warnings like: 'clocks' is a dependency of 'assigned-clocks' With the addition of new properties also sort the node properties a little bit. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329184339.1134-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | | arm64: dts: rockchip: add clocks to rk356x cruPeter Geis2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rk356x cru requires a 24m clock input to function. Add the clocks properties to the cru to clear some dtbs_check warnings. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220511150117.113070-3-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | | | arm64: dts: sprd: use new 'dma-channels' propertyKrzysztof Kozlowski2022-05-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The '#dma-channels' property was deprecated in favor of one defined by generic dma-common DT bindings. Add new property while keeping old one for backwards compatibility. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/20220516142857.6419-4-krzysztof.kozlowski@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | | Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2022-05-26319-2911/+23243
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
generated by cgit v1.2.3-71-gd317 (git 2.46.0) at 2026-01-12 16:17:07 +0000