| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| | | * | | | | | | | | | | | | arm64: Treat ESR_ELx as a 64-bit register | Alexandru Elisei | 2022-04-29 | 14 | -116/+116 | |
| | | * | | | | | | | | | | | | arm64: compat: Do not treat syscall number as ESR_ELx for a bad syscall | Alexandru Elisei | 2022-04-29 | 1 | -1/+1 | |
| | | * | | | | | | | | | | | | arm64: Make ESR_ELx_xVC_IMM_MASK compatible with assembly | Alexandru Elisei | 2022-04-29 | 1 | -1/+1 | |
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| | * | | | | | | | | | | | | Merge branch 'for-next/sysreg-gen' into for-next/core | Catalin Marinas | 2022-05-20 | 19 | -220/+784 | |
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| | | * | | | | | | | | | | | | arm64/sysreg: Generate definitions for FAR_ELx | Mark Brown | 2022-05-20 | 2 | -3/+12 | |
| | | * | | | | | | | | | | | | arm64/sysreg: Generate definitions for DACR32_EL2 | Mark Brown | 2022-05-20 | 2 | -1/+20 | |
| | | * | | | | | | | | | | | | arm64/sysreg: Generate definitions for CSSELR_EL1 | Mark Brown | 2022-05-20 | 2 | -2/+7 | |
| | | * | | | | | | | | | | | | arm64/sysreg: Generate definitions for CPACR_ELx | Mark Brown | 2022-05-20 | 2 | -2/+20 | |
| | | * | | | | | | | | | | | | arm64/sysreg: Generate definitions for CONTEXTIDR_ELx | Mark Brown | 2022-05-20 | 2 | -2/+17 | |
| | | * | | | | | | | | | | | | arm64/sysreg: Generate definitions for CLIDR_EL1 | Mark Brown | 2022-05-20 | 2 | -1/+16 | |
| | | * | | | | | | | | | | | | arm64/sve: Generate ZCR definitions | Mark Brown | 2022-05-16 | 2 | -7/+18 | |
| | | * | | | | | | | | | | | | arm64/sme: Generate defintions for SVCR | Mark Brown | 2022-05-16 | 2 | -4/+6 | |
| | | * | | | | | | | | | | | | arm64/sme: Generate SMPRI_EL1 definitions | Mark Brown | 2022-05-16 | 2 | -3/+5 | |
| | | * | | | | | | | | | | | | arm64/sme: Automatically generate SMPRIMAP_EL2 definitions | Mark Brown | 2022-05-16 | 2 | -1/+19 | |
| | | * | | | | | | | | | | | | arm64/sme: Automatically generate SMIDR_EL1 defines | Mark Brown | 2022-05-16 | 2 | -1/+9 | |
| | | * | | | | | | | | | | | | arm64/sme: Automatically generate defines for SMCR | Mark Brown | 2022-05-16 | 2 | -10/+20 | |
| | | * | | | | | | | | | | | | arm64/sysreg: Support generation of RAZ fields | Mark Brown | 2022-05-16 | 1 | -0/+7 | |
| | | * | | | | | | | | | | | | arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h | Mark Brown | 2022-05-16 | 9 | -35/+35 | |
| | | * | | | | | | | | | | | | arm64/sme: Standardise bitfield names for SVCR | Mark Brown | 2022-05-16 | 4 | -8/+8 | |
| | | * | | | | | | | | | | | | arm64/sme: Drop SYS_ from SMIDR_EL1 defines | Mark Brown | 2022-05-16 | 2 | -4/+4 | |
| | | * | | | | | | | | | | | | arm64/fp: Rename SVE and SME LEN field name to _WIDTH | Mark Brown | 2022-05-16 | 2 | -4/+4 | |
| | | * | | | | | | | | | | | | arm64/fp: Make SVE and SME length register definition match architecture | Mark Brown | 2022-05-16 | 1 | -14/+4 | |
| | | * | | | | | | | | | | | | Merge branch 'for-next/sme' into for-next/sysreg-gen | Catalin Marinas | 2022-05-16 | 32 | -130/+1955 | |
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| | | * | | | | | | | | | | | | | arm64/sysreg: fix odd line spacing | Mark Rutland | 2022-05-15 | 1 | -3/+3 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: improve comment for regs without fields | Mark Rutland | 2022-05-15 | 1 | -1/+1 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Generate definitions for SCTLR_EL1 | Mark Brown | 2022-05-04 | 2 | -38/+71 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Generate definitions for TTBRn_EL1 | Mark Brown | 2022-05-04 | 2 | -2/+14 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1 | Mark Brown | 2022-05-04 | 2 | -20/+67 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Enable automatic generation of system register definitions | Mark Brown | 2022-05-04 | 3 | -1/+16 | |
| | | * | | | | | | | | | | | | | arm64: Add sysreg header generation scripting | Mark Rutland | 2022-05-04 | 2 | -0/+309 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names | Mark Brown | 2022-05-04 | 4 | -67/+67 | |
| | | * | | | | | | | | | | | | | arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM | Mark Brown | 2022-05-04 | 3 | -5/+5 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1 | Mark Brown | 2022-05-04 | 1 | -21/+32 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWI | Mark Brown | 2022-05-04 | 1 | -3/+3 | |
| | | * | | | | | | | | | | | | | arm64/mte: Make TCF field values and naming more standard | Mark Brown | 2022-05-04 | 3 | -12/+14 | |
| | | * | | | | | | | | | | | | | arm64/mte: Make TCF0 naming and field values more standard | Mark Brown | 2022-05-04 | 2 | -7/+7 | |
| | | * | | | | | | | | | | | | | arm64/sysreg: Introduce helpers for access to sysreg fields | Mark Brown | 2022-05-04 | 1 | -0/+6 | |
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| | *---------. \ \ \ \ \ \ \ \ \ \ \ \ | Merge branches 'for-next/sme', 'for-next/stacktrace', 'for-next/fault-in-subp... | Catalin Marinas | 2022-05-20 | 55 | -361/+2309 | |
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| | | | | | | | * | | | | | | | | | | | | arm64: kdump: Do not allocate crash low memory if not needed | Zhen Lei | 2022-05-16 | 1 | -1/+2 | |
| | | | | | | | * | | | | | | | | | | | | arm64: kdump: Reimplement crashkernel=X | Chen Zhou | 2022-05-07 | 3 | -10/+74 | |
| | | | | | | | * | | | | | | | | | | | | arm64: Use insert_resource() to simplify code | Zhen Lei | 2022-05-07 | 2 | -14/+4 | |
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| | | | | | | * | | | | | | | | | | | | arm64/ftrace: Make function graph use ftrace directly | Chengming Zhou | 2022-04-29 | 3 | -17/+24 | |
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| | | | | | * | | | | | | | | | | | | arm64: Kconfig.platforms: Add comments | Juerg Haefliger | 2022-05-18 | 1 | -1/+1 | |
| | | | | | * | | | | | | | | | | | | arm64: Kconfig: Fix indentation and add comments | Juerg Haefliger | 2022-05-18 | 1 | -48/+47 | |
| | | | | | * | | | | | | | | | | | | arm64: mm: avoid writable executable mappings in kexec/hibernate code | Ard Biesheuvel | 2022-05-17 | 1 | -1/+1 | |
| | | | | | * | | | | | | | | | | | | arm64: lds: move special code sections out of kernel exec segment | Ard Biesheuvel | 2022-05-17 | 1 | -9/+12 | |
| | | | | | * | | | | | | | | | | | | arm64/hugetlb: Implement arm64 specific huge_ptep_get() | Baolin Wang | 2022-05-16 | 2 | -0/+24 | |
| | | | | | * | | | | | | | | | | | | arm64/hugetlb: Use ptep_get() to get the pte value of a huge page | Baolin Wang | 2022-05-16 | 1 | -4/+4 | |
| | | | | | * | | | | | | | | | | | | arm64: mm: Make arch_faults_on_old_pte() check for migratability | Valentin Schneider | 2022-05-16 | 1 | -1/+2 | |
| | | | | | * | | | | | | | | | | | | arm64: mte: Clean up user tag accessors | Robin Murphy | 2022-05-16 | 1 | -2/+2 | |
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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