index
:
sinitax/cachepc-linux
master
Fork of AMDESE/linux with modifications for CachePC side-channel attack
Louis Burda
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
arch
/
mips
/
boot
/
dts
/
mscc
/
ocelot.dtsi
Commit message (
Expand
)
Author
Age
Files
Lines
*
MIPS: mscc: ocelot: rename pinctrl nodes
Michael Walle
2022-04-27
1
-2
/
+2
*
MIPS: mscc: ocelot: disable all switch ports by default
Vladimir Oltean
2021-08-21
1
-0
/
+11
*
net: mscc: ocelot: add definitions for VCAP ES0 keys, actions and target
Vladimir Oltean
2020-09-29
1
-1
/
+2
*
net: mscc: ocelot: add definitions for VCAP IS1 keys, actions and target
Vladimir Oltean
2020-09-29
1
-1
/
+2
*
MIPS: dts: mscc: Updated changed name for miim pinctrl function
Lars Povlsen
2020-05-14
1
-1
/
+1
*
MIPS: dts: mscc: describe the PTP ready interrupt
Antoine Tenart
2019-08-24
1
-2
/
+2
*
MIPS: dts: mscc: describe the PTP register range
Antoine Tenart
2019-08-24
1
-1
/
+2
*
net: mscc: ocelot: Add support for tcam
Horatiu Vultur
2019-06-02
1
-2
/
+3
*
Merge tag 'mips_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/l...
Linus Torvalds
2018-10-26
1
-0
/
+19
|
\
|
*
MIPS: dts: mscc: Add i2c on ocelot
Alexandre Belloni
2018-09-05
1
-0
/
+19
*
|
MIPS: mscc: ocelot: add SerDes mux DT node
Quentin Schulz
2018-10-05
1
-0
/
+5
*
|
MIPS: mscc: ocelot: make HSIO registers address range a syscon
Quentin Schulz
2018-10-05
1
-5
/
+9
|
/
*
mips: dts: mscc: Add spi on Ocelot
Alexandre Belloni
2018-07-31
1
-0
/
+11
*
MIPS: mscc: ocelot: add interrupt controller properties to GPIO controller
Quentin Schulz
2018-07-30
1
-0
/
+3
*
MIPS: mscc: ocelot: add MIIM1 bus
Quentin Schulz
2018-07-26
1
-0
/
+16
*
MIPS: mscc: ocelot: fix length of memory address space for MIIM
Quentin Schulz
2018-07-26
1
-1
/
+1
*
MIPS: mscc: Add switch to ocelot
Alexandre Belloni
2018-05-14
1
-0
/
+88
*
MIPS: mscc: Add ocelot dtsi
Alexandre Belloni
2018-03-21
1
-0
/
+117