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* MIPS: remove asm/war.hThomas Bogendoerfer2022-02-221-73/+0
| | | | | | | | The major part for workaround handling has already moved to config options. This change replaces the remaining defines by already available config options and gets rid of war.h Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Remove mach-*/war.hThomas Bogendoerfer2020-09-071-2/+0
| | | | | | | After conversion of all WAR defines we can now remove all mach-*/war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Get rid of BCM1250_M3_WARThomas Bogendoerfer2020-09-071-14/+0
| | | | | | | BCM1250_M3_WAR is depending on CONFIG_CONFIG_SB1_PASS_2_WORKAROUNDS. So using this option directly lets and remove define. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDSThomas Bogendoerfer2020-09-071-7/+0
| | | | | | | SB1250 uart bug is related to PASS 2 workarounds. Use config CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config optionThomas Bogendoerfer2020-09-071-7/+0
| | | | | | | Use a new config option to enable MIPS 34K ITLB workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Convert R10000_LLSC_WAR info a config optionThomas Bogendoerfer2020-09-071-8/+0
| | | | | | | Use a new config option to enabel R1000_LLSC workaound and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config optionThomas Bogendoerfer2020-09-071-10/+0
| | | | | | | Use a new config option to enable I-cache refill workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config optionThomas Bogendoerfer2020-09-071-11/+0
| | | | | | | Use a new config option to enable TX49XX I-cache index invalidate workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WARThomas Bogendoerfer2020-09-071-35/+0
| | | | | | | Neither MIPS4K_ICACHE_REFILL_WAR nor MIPS_CACHE_SYNC_WAR are implemented, so removing defines for it won't change anything. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Convert R4600_V2_HIT_CACHEOP into a config optionThomas Bogendoerfer2020-09-071-15/+0
| | | | | | | Use a new config option to enable R4600 V2 cacheop hit workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Convert R4600_V1_HIT_CACHEOP into a config optionThomas Bogendoerfer2020-09-071-31/+0
| | | | | | | Use a new config option to enable R4600 V1 cacheop hit workaround and remove define from the different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config optionThomas Bogendoerfer2020-09-071-10/+0
| | | | | | | Use a new config option to enable R4600 V1 index I-cacheop workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* mips: Replace HTTP links with HTTPS onesAlexander A. Klimov2020-07-161-1/+1
| | | | | | | | | | | | | | | | | | | | Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton2019-07-231-13/+0
| | | | | | | | R5432_CP0_INTERRUPT_WAR is defined as 0 for every system we support, and so the workaround is never used. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-23/+23
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-8/+0
| | | | | | | Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Fix common misspellingsLucas De Marchi2011-03-311-1/+1
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+244
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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