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path: root/drivers/gpu/drm/amd/amdgpu/soc21.c
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* drm/amdgpu: suppress some compile warningsEvan Quan2022-05-261-0/+1
| | | | | | | | | Suppress two compile warnings about "no previous prototype". Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: support memory power gating for lsdma 6.0.2Likun Gao2022-05-101-0/+1
| | | | | | | | Support memory power gating control for lsdma 6.0.2. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: support memory power gating for lsdmaLikun Gao2022-05-101-1/+11
| | | | | | | | Support memory power gating control for LSDMA. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: simplify nv and soc21 read_register functionsAlex Deucher2022-05-061-3/+3
| | | | | | | | | | Check of the base offset for the IP exists rather than explicitly checking for how many instances of a particular IP there are. This is what soc15.c already does. Expand this to nv.c and soc21.c. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add soc21 common ip block support for GC 11.0.1Huang Rui2022-05-061-0/+5
| | | | | | | | Add common soc21 ip block support for GC 11.0.1. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add pcie port function helpers for SOC21Xiaojian Du2022-05-061-0/+2
| | | | | | | | These helpers will be used on NBIO v7.7.0. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: handle asics with 1 SDMA instanceXiaojian Du2022-05-061-2/+3
| | | | | | | | | This patch will handle asics with 1 SDMA instance. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/soc21: enable mmhub and athub power gatingKenneth Feng2022-05-051-1/+3
| | | | | | | | add the pg_flag for athub and mmhub pg. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable cgcg and cgls for GC 11_0_2Likun Gao2022-05-051-0/+2
| | | | | | | | Enable GFX CGCG and CGLS for GFX v11_0_2. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn: enable VCN DPG mode for VCN4_0_4James Zhu2022-05-051-0/+1
| | | | | | | | Enable VCN DPG mode for VCN4_0_4. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn: enable VCN PG for VCN4_0_4James Zhu2022-05-051-0/+1
| | | | | | | | Enable VCN PG for VCN4_0_4. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn: enable VCN CG for VCN4_0_4James Zhu2022-05-051-0/+1
| | | | | | | | Enable VCN CG for VCN4_0_4. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/jpeg: enable JPEG PG for VCN4_0_4James Zhu2022-05-051-1/+2
| | | | | | | | Enable JPEG PG for VCN4_0_4. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/jpeg: enable JPEG CG for VCN4_0_4James Zhu2022-05-051-1/+2
| | | | | | | | Enable JPEG CG for VCN4_0_4. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add soc21 support for GC 11.0.2Flora Cui2022-05-051-0/+5
| | | | | | | | Add initial soc21 support. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Flora Cui <flora.cui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable clock gating for HDP 6.0Evan Quan2022-05-051-1/+2
| | | | | | | | Enable HDP 6.0 clock gating. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable clock gating for IH 6.0Evan Quan2022-05-051-1/+2
| | | | | | | | Enable IH 6.0 clock gating. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable MGCG and LS for MMHUB 3.0Evan Quan2022-05-051-1/+3
| | | | | | | | Enable MMHUB 3.0 MGCG and LS features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable MGCG and LS for ATHUB 3.0Evan Quan2022-05-051-1/+3
| | | | | | | | Enable ATHUB 3.0 MGCG and LS features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable more GFX clockgating features for GC 11.0.0Evan Quan2022-05-051-0/+5
| | | | | | | | | Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG, FGCG and PERF_CLK). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add vcn_4_0_0 video codec queryJames Zhu2022-05-041-0/+44
| | | | | | | | Add vcn_4_0_0 video codec query. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn: enable vcn4 dpg modeJames Zhu2022-05-041-0/+1
| | | | | | | | Enable vcn4 dpg mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/jpeg: enable JPEG PG and CG for VCN4_0_0James Zhu2022-05-041-1/+3
| | | | | | | | | | Enable JPEG PG and CG for VCN4_0_0. Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable VCN4 PG and CG for VCN4_0_0Leo Liu2022-05-041-2/+4
| | | | | | | | Most of the tiles can be power/clock gated. Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable fgcg for soc21Evan Quan2022-05-041-1/+2
| | | | | | | Enable Fine Grained Clock Gating on soc21 asics. Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable GFX CGCG/CGLS for GC11.0.0Evan Quan2022-05-041-1/+2
| | | | | | | | | | Enable GFX CGCG (coarse grained clockgating) and CGLS (coarse grained light sleep) for GC11.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: correct cp doorbell rangeJack Xiao2022-05-041-0/+4
| | | | | | | | | | | | | 1. move MES doorbell inside the mec doorbell range, for mes belongs to mec block 2. setting the correct gfx/mec doorbell range, so that fw can correctly detect gfx/compute work load to enter/exit power saving state. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Tested-and-acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: allocate doorbell index for mes kiqJack Xiao2022-05-041-1/+2
| | | | | | | | Allocate a doorbell index for mes kiq queue. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/soc21: enable ATHUB and MMHUB PGEvan Quan2022-05-041-1/+2
| | | | | | | | Enable ATHUB and MMHUB powergating. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add soc21 common ip block v2Stanley.Yang2022-04-281-0/+620
This adds soc21 common ip block support Changed from v1: Switch WREG32/RREG32_PCIE to use indirect reg access helper for sco15 and onwards Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3-71-gd317 (git 2.46.0) at 2026-01-02 14:45:41 +0000