| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | drm/amd: append missing includes | Isabella Basso | 2021-12-13 | 1 | -0/+2 |
| * | drm/amd/display: Refactor visual confirm | Wyatt Wood | 2021-06-08 | 1 | -2/+1 |
| * | Revert "drm/amd/display: Refactor and add visual confirm for HW Flip Queue" | Qingqing Zhuo | 2021-05-27 | 1 | -1/+0 |
| * | drm/amd/display: Refactor and add visual confirm for HW Flip Queue | Wyatt Wood | 2021-05-19 | 1 | -0/+1 |
| * | drm/amd/display: Connect clock optimization function to dcn301 | Mikita Lipski | 2021-04-15 | 1 | -0/+2 |
| * | drm/amd/display: Add function and debugfs to dump DCC_EN bit | Victor Lu | 2021-04-09 | 1 | -1/+2 |
| * | drm/amd/display: Old sequence for HUBP blank | Aurabindo Pillai | 2021-02-18 | 1 | -1/+0 |
| * | drm/amd/display: New sequence for HUBP blank | Wesley Chalmers | 2021-01-13 | 1 | -0/+1 |
| * | drm/amd/display: fix the NULL pointer that missed set_disp_pattern_generator ... | Huang Rui | 2020-11-02 | 1 | -0/+1 |
| * | drm/amd/display: Update GSL state if leaving immediate flip | Alvin Lee | 2020-10-26 | 1 | -1/+0 |
| * | drm/amd/display: Add dcn3.01 support to DC (v2) | Roman Li | 2020-10-05 | 1 | -0/+145 |
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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