summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/pm
Commit message (Expand)AuthorAgeFilesLines
...
* drm/amd/pm: add some swSMU functions for vangogh.Xiaojian Du2020-10-301-73/+338
* drm/amd/pm: add one new function to get 32 bit feature mask for vangoghXiaojian Du2020-10-302-5/+54
* drm/amd/pm: remove some redundant smu message mapping for vangoghXiaojian Du2020-10-301-4/+0
* drm/amd/pm: set the initial value of pm info to zeroXiaojian Du2020-10-301-1/+1
* drm/amd/pm: update the smu v11.5 driver interface header for vangoghXiaojian Du2020-10-302-36/+36
* drm/amd/pm: add UMD Pstate Msg Parameters for vangogh temporarilyXiaojian Du2020-10-301-0/+5
* drm/amd/pm: add new smc message mapping for vangoghXiaojian Du2020-10-301-0/+24
* drm/amd/pm: update the smu v11.5 firmware header for vangoghXiaojian Du2020-10-301-1/+1
* drm/amd/pm: update the smu v11.5 smc header for vangoghXiaojian Du2020-10-301-46/+68
* drm/amdgpu/pm: fix the fan speed in fan1_input in manual mode for navi1xAlex Deucher2020-10-271-8/+3
* drm/amdgpu/swsmu: drop smu i2c bus on navi1xAlex Deucher2020-10-271-25/+0
* drm/amd/pm: drop redundant display settingEvan Quan2020-10-271-12/+0
* drm/amd/pm: reconfigure smc on display vbitimeout setting changeEvan Quan2020-10-272-0/+7
* drm/amd/pm: correct the mclk switching settingEvan Quan2020-10-272-17/+108
* drm/amd/pm: enable Polaris watermark table settingEvan Quan2020-10-271-0/+50
* drm/amd/pm: fulfill the Polaris implementation for get_clock_by_type_with_lat...Evan Quan2020-10-271-0/+67
* drm/amd/pm: correct vddc_dep_on_dal_pwrl setupEvan Quan2020-10-271-3/+15
* drm/amd/pm: correct SMC sclk/mclk boot level setupEvan Quan2020-10-271-0/+8
* drm/amd/pm: correct pcie spc cap setupEvan Quan2020-10-271-0/+2
* drm/amd/pm: correct clk/voltage dependence setupEvan Quan2020-10-271-0/+2
* drm/amd/pm: correct the way to get the highest vddcEvan Quan2020-10-271-2/+28
* drm/amd/pm: correct sclk/mclk dpm enablementEvan Quan2020-10-272-3/+9
* drm/amd/pm: correct smc voltage controller setupEvan Quan2020-10-271-1/+2
* drm/amd/pm: correct platformcaps setupEvan Quan2020-10-273-4/+19
* drm/amd/pm: correct VRconfig settingEvan Quan2020-10-271-1/+14
* drm/amd/pm: correct vddc phase control settingEvan Quan2020-10-272-14/+24
* drm/amd/pm: correct avfs fuse settingsEvan Quan2020-10-271-32/+23
* drm/amd/pm: correct Polaris DIDT configurationsEvan Quan2020-10-272-2/+34
* drm/amd/pm: correct Polaris powertune table setupEvan Quan2020-10-273-1/+85
* drm/amd/pm: correct the checks for sclk/mclk SS supportEvan Quan2020-10-274-1/+26
* drm/amd/pm: correct VR shared rail infoEvan Quan2020-10-274-1/+31
* drm/amd/pm: add mc register table initializationEvan Quan2020-10-274-0/+58
* drm/amd/pm: add edc leakage controller settingEvan Quan2020-10-275-0/+236
* drm/amd/pm: setup zero rpm parameters for polaris10Evan Quan2020-10-273-0/+29
* drm/amd/pm: correct polaris10 clock stretcher data table settingEvan Quan2020-10-271-31/+11
* drm/amd/pm: correct the settings for ro range minimum and maximumEvan Quan2020-10-272-0/+65
* drm/amd/pm: drop redundant efuse mask calculationsEvan Quan2020-10-274-6/+10
* drm/amd/pm: optimize AC timing programmingEvan Quan2020-10-271-1/+1
* drm/amd/powerplay: separate Polaris fan table setup from TongaEvan Quan2020-10-272-1/+87
* drm/amd/pm: add PWR_CKS_CNTL settingEvan Quan2020-10-271-4/+11
* drm/amd/pm: drop arb table first byte workaroundEvan Quan2020-10-271-31/+0
* drm/amd/pm: add pptable VRHotLevel settingEvan Quan2020-10-271-0/+3
* drm/amd/pm: correct the BootLinkLevel setupEvan Quan2020-10-271-1/+1
* drm/amd/pm: correct the ACPI table setup V2Evan Quan2020-10-271-1/+2
* drm/amd/pm: correct mclk table setupEvan Quan2020-10-271-12/+8
* drm/amd/pm: correct sclk table setupEvan Quan2020-10-271-2/+21
* drm/amd/pm: correct vddci table setupEvan Quan2020-10-271-2/+2
* drm/amd/pm: populate smc samu tableEvan Quan2020-10-271-0/+53
* drm/amd/pm: populate smc vddc tableEvan Quan2020-10-271-0/+26
* drm/amd/pm: update driver if version for dimgrey_cavefishTao Zhou2020-10-261-1/+1