| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | drm/i915: Move MCHBAR registers to their own header | Matt Roper | 2022-02-16 | 1 | -0/+1 |
| * | drm/i915: Only include i915_reg.h from .c files | Matt Roper | 2022-02-02 | 1 | -0/+1 |
| * | drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_* | Jani Nikula | 2022-01-13 | 1 | -5/+4 |
| * | Merge tag 'drm-intel-gt-next-2021-10-21' of git://anongit.freedesktop.org/drm... | Dave Airlie | 2021-10-22 | 1 | -0/+1 |
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| | * | drm/i915/gt: include tsc.h where used | Lucas De Marchi | 2021-10-12 | 1 | -0/+1 |
| * | | drm/i915: split out intel_pcode.[ch] to separate file | Jani Nikula | 2021-10-14 | 1 | -1/+1 |
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| * | drm/i915/gt: replace IS_GEN and friends with GRAPHICS_VER | Lucas De Marchi | 2021-06-05 | 1 | -3/+3 |
| * | drm/i915/gt: SPDX cleanup | Chris Wilson | 2021-03-24 | 1 | -2/+1 |
| * | drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx | Chris Wilson | 2020-02-19 | 1 | -2/+4 |
| * | drm/i915: Extract GT render power state management | Andi Shyti | 2019-10-26 | 1 | -1/+1 |
| * | drm/i915: Extract GT ring management | Andi Shyti | 2019-10-20 | 1 | -0/+161 |
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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