| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | drm/tegra: dc: Trace register accesses | Thierry Reding | 2017-08-17 | 1 | -0/+2 |
| Add tracepoint events for display controller register accesses. Signed-off-by: Thierry Reding <treding@nvidia.com> | |||||
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
| summaryrefslogtreecommitdiffstats |
| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | drm/tegra: dc: Trace register accesses | Thierry Reding | 2017-08-17 | 1 | -0/+2 |
| Add tracepoint events for display controller register accesses. Signed-off-by: Thierry Reding <treding@nvidia.com> | |||||