| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | interconnect: qcom: Add EPSS L3 support on SC7280 | Odelu Kukatla | 2021-11-22 | 1 | -0/+2 |
| | | | | | | | | | | | | Add Epoch Subsystem (EPSS) L3 interconnect provider support on SC7280 SoCs. Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1634812857-10676-3-git-send-email-okukatla@codeaurora.org Signed-off-by: Georgi Djakov <djakov@kernel.org> | ||||
| * | interconnect: qcom: Add SC7280 interconnect provider driver | Odelu Kukatla | 2021-05-11 | 1 | -0/+154 |
| Add driver for the Qualcomm interconnect buses found in SC7280 based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org> Link: https://lore.kernel.org/r/1619517059-12109-3-git-send-email-okukatla@codeaurora.org Signed-off-by: Georgi Djakov <djakov@kernel.org> | |||||
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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