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sinitax/cachepc-linux
master
Fork of AMDESE/linux with modifications for CachePC side-channel attack
Louis Burda
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path:
root
/
drivers
/
net
/
ipa
/
gsi_trans.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
net: ipa: remove command info pool
Alex Elder
2022-05-22
1
-5
/
+5
*
net: ipa: remove command direction argument
Alex Elder
2022-05-22
1
-2
/
+1
*
net: ipa: get rid of ipa_cmd_info->direction
Alex Elder
2022-05-22
1
-4
/
+1
*
net: ipa: kill gsi_trans_commit_wait_timeout()
Alex Elder
2022-05-22
1
-22
/
+0
*
net: ipa: introduce gsi_channel_trans_idle()
Alex Elder
2022-02-04
1
-0
/
+11
*
net: ipa: use WARN_ON() rather than assertions
Alex Elder
2021-07-26
1
-12
/
+18
*
net: ipa: kill the remaining conditional validation code
Alex Elder
2021-07-26
1
-4
/
+0
*
net: ipa: relax pool entry size requirement
Alex Elder
2021-04-09
1
-2
/
+2
*
net: ipa: DMA addresses are nicely aligned
Alex Elder
2021-03-28
1
-5
/
+4
*
net: ipa: pass the correct size when freeing DMA memory
Alex Elder
2020-12-04
1
-1
/
+6
*
net: ipa: lock when freeing transaction
Alex Elder
2020-11-16
1
-3
/
+12
*
net: ipa: command payloads already mapped
Alex Elder
2020-10-23
1
-6
/
+15
*
net: ipa: kill definition of TRE_FLAGS_IEOB_FMASK
Alex Elder
2020-09-28
1
-1
/
+0
*
net: ipa: set DMA length in gsi_trans_cmd_add()
Alex Elder
2020-05-11
1
-2
/
+3
*
soc: qcom: ipa: GSI transactions
Alex Elder
2020-03-08
1
-0
/
+786