| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ath11k: Add support for WCN6750 device | Manikanta Pubbisetty | 2022-05-02 | 1 | -0/+23 |
| * | ath11k: Add register access logic for WCN6750 | Manikanta Pubbisetty | 2022-05-02 | 1 | -35/+19 |
| * | ath11k: Move parameters in bus_params to hw_params | Manikanta Pubbisetty | 2022-05-02 | 1 | -2/+2 |
| * | ath11k: Remove core PCI references from PCI common code | Manikanta Pubbisetty | 2022-04-05 | 1 | -110/+59 |
| * | ath11k: Refactor MSI logic to support WCN6750 | Manikanta Pubbisetty | 2022-04-05 | 1 | -33/+8 |
| * | ath11k: Choose MSI config based on HW revision | Manikanta Pubbisetty | 2022-04-05 | 1 | -0/+70 |
| * | ath11k: Refactor PCI code to support WCN6750 | Manikanta Pubbisetty | 2022-04-05 | 1 | -0/+747 |
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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