sinitax/cachepc-linux - Fork of AMDESE/linux with modifications for CachePC side-channel attack

	Commit message (Expand)	Author	Age	Files	Lines
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* \|	PCI: cadence: Allow pci_host_bridge to have custom pci_ops	Kishon Vijay Abraham I	2020-07-27	1	-1/+2
* \|	PCI: cadence: Add support to start link and verify link status	Kishon Vijay Abraham I	2020-07-27	3	-1/+72
* \|	PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses	Kishon Vijay Abraham I	2020-07-27	2	-18/+62
* \|	PCI: cadence: Fix cdns_pcie_{host\|ep}_setup() error path	Kishon Vijay Abraham I	2020-07-27	2	-12/+3
* \|	PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" property	Kishon Vijay Abraham I	2020-07-27	2	-17/+263
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*	Merge branch 'remotes/lorenzo/pci/rcar'	Bjorn Helgaas	2020-06-04	1	-1/+1
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\| *	PCI: endpoint: Pass page size as argument to pci_epc_mem_init()	Lad Prabhakar	2020-05-11	1	-1/+1
* \|	PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT	Kishon Vijay Abraham I	2020-05-18	2	-4/+4
* \|	PCI: cadence: Remove "cdns,max-outbound-regions" DT property	Kishon Vijay Abraham I	2020-05-18	2	-8/+0
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*	Merge branch 'remotes/lorenzo/pci/mmio-dma-ranges'	Bjorn Helgaas	2019-11-28	1	-1/+1
*	Merge branch 'remotes/lorenzo/pci/cadence'	Bjorn Helgaas	2019-11-28	1	-1/+1
*	PCI: cadence: Move all files to per-device cadence directory	Tom Joseph	2019-11-11	7	-0/+1636