| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Revert "reset: Add a Gemini reset controller" | Linus Walleij | 2017-08-07 | 1 | -110/+0 |
| | | | | | | | | | | | | This reverts commit 2acb037fc42b8ce5ae59a7d5db3c9b35672e3dd7. We ended up merging the reset controller into the clock controller so we can now get rid of this stand-alone implementation. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> | ||||
| * | reset: Add a Gemini reset controller | Linus Walleij | 2017-05-24 | 1 | -0/+110 |
| The Cortina Systems Gemini reset controller is a simple 32bit register with self-deasserting reset lines. It is accessed using regmap over syscon. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> | |||||
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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