| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | MIPS: Move headfiles to new location below arch/mips/include | Ralf Baechle | 2008-10-11 | 1 | -85/+0 |
| | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | ||||
| * | MIPS: DSP: Set all register masks to 0x3ff. | Ralf Baechle | 2006-01-10 | 1 | -3/+3 |
| | | | | | | | | 0x2ff was a typo and the value 0x1f of DSP_MASK was refering to an old version of the documentation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | ||||
| * | MIPS: DSP: Context switch the DSPcontrol register also. | Ralf Baechle | 2006-01-10 | 1 | -0/+2 |
| | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | ||||
| * | Support the MIPS32 / MIPS64 DSP ASE. | Ralf Baechle | 2005-10-29 | 1 | -0/+83 |
| Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | |||||
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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