| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | dt-bindings: memory: tegra20: Add memory client IDs | Dmitry Osipenko | 2020-11-26 | 1 | -0/+53 |
| | | | | | | | | | | Each memory client has unique hardware ID, add these IDs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> | ||||
| * | dt-bindings: memory: tegra: Add hot resets definitions | Dmitry Osipenko | 2018-04-27 | 1 | -0/+21 |
| Add definitions for the Tegra20+ memory controller hot resets. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> | |||||
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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