| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ASoC: Intel: avs: Configure modules according to their type | Cezary Rojewski | 2022-04-19 | 1 | -1/+377 |
| * | ASoC: Intel: avs: Prepare modules before bindings them | Cezary Rojewski | 2022-04-19 | 1 | -0/+35 |
| * | ASoC: Intel: avs: Arm paths after creating them | Cezary Rojewski | 2022-04-19 | 1 | -0/+180 |
| * | ASoC: Intel: avs: Path state management | Cezary Rojewski | 2022-04-19 | 1 | -0/+130 |
| * | ASoC: Intel: avs: Path creation and freeing | Cezary Rojewski | 2022-04-19 | 1 | -0/+284 |
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index : sinitax/cachepc-linux | |
| Fork of AMDESE/linux with modifications for CachePC side-channel attack | Louis Burda |
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