cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

target_arch_reg.h (2526B)

      1/*
      2 *  FreeBSD i386 register structures
      3 *
      4 *  Copyright (c) 2015 Stacey Son
      5 *  All rights reserved.
      6 *
      7 *  This program is free software; you can redistribute it and/or modify
      8 *  it under the terms of the GNU General Public License as published by
      9 *  the Free Software Foundation; either version 2 of the License, or
     10 *  (at your option) any later version.
     11 *
     12 *  This program is distributed in the hope that it will be useful,
     13 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
     14 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 *  GNU General Public License for more details.
     16 *
     17 *  You should have received a copy of the GNU General Public License
     18 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
     19 */
     20
     21#ifndef _TARGET_ARCH_REG_H_
     22#define _TARGET_ARCH_REG_H_
     23
     24/* See sys/i386/include/reg.h */
     25typedef struct target_reg {
     26    uint32_t        r_fs;
     27    uint32_t        r_es;
     28    uint32_t        r_ds;
     29    uint32_t        r_edi;
     30    uint32_t        r_esi;
     31    uint32_t        r_ebp;
     32    uint32_t        r_isp;
     33    uint32_t        r_ebx;
     34    uint32_t        r_edx;
     35    uint32_t        r_ecx;
     36    uint32_t        r_eax;
     37    uint32_t        r_trapno;
     38    uint32_t        r_err;
     39    uint32_t        r_eip;
     40    uint32_t        r_cs;
     41    uint32_t        r_eflags;
     42    uint32_t        r_esp;
     43    uint32_t        r_ss;
     44    uint32_t        r_gs;
     45} target_reg_t;
     46
     47typedef struct target_fpreg {
     48    uint32_t        fpr_env[7];
     49    uint8_t         fpr_acc[8][10];
     50    uint32_t        fpr_ex_sw;
     51    uint8_t         fpr_pad[64];
     52} target_fpreg_t;
     53
     54static inline void target_copy_regs(target_reg_t *regs, const CPUX86State *env)
     55{
     56
     57    regs->r_fs = env->segs[R_FS].selector & 0xffff;
     58    regs->r_es = env->segs[R_ES].selector & 0xffff;
     59    regs->r_ds = env->segs[R_DS].selector & 0xffff;
     60
     61    regs->r_edi = env->regs[R_EDI];
     62    regs->r_esi = env->regs[R_ESI];
     63    regs->r_ebp = env->regs[R_EBP];
     64    /* regs->r_isp = env->regs[R_ISP]; XXX */
     65    regs->r_ebx = env->regs[R_EBX];
     66    regs->r_edx = env->regs[R_EDX];
     67    regs->r_ecx = env->regs[R_ECX];
     68    regs->r_eax = env->regs[R_EAX];
     69    /* regs->r_trapno = env->regs[R_TRAPNO]; XXX */
     70    regs->r_err = env->error_code;  /* XXX ? */
     71    regs->r_eip = env->eip;
     72
     73    regs->r_cs = env->segs[R_CS].selector & 0xffff;
     74
     75    regs->r_eflags = env->eflags;
     76    regs->r_esp = env->regs[R_ESP];
     77
     78    regs->r_ss = env->segs[R_SS].selector & 0xffff;
     79    regs->r_gs = env->segs[R_GS].selector & 0xffff;
     80}
     81
     82#endif /* !_TARGET_ARCH_REG_H_ */