utils.h (9639B)
1// Copyright 2015, ARM Limited 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright notice, 10// this list of conditions and the following disclaimer in the documentation 11// and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may be 13// used to endorse or promote products derived from this software without 14// specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27#ifndef VIXL_UTILS_H 28#define VIXL_UTILS_H 29 30#include <cmath> 31#include <cstring> 32#include "vixl/globals.h" 33#include "vixl/compiler-intrinsics.h" 34 35namespace vixl { 36 37// Macros for compile-time format checking. 38#if GCC_VERSION_OR_NEWER(4, 4, 0) 39#define PRINTF_CHECK(format_index, varargs_index) \ 40 __attribute__((format(gnu_printf, format_index, varargs_index))) 41#else 42#define PRINTF_CHECK(format_index, varargs_index) 43#endif 44 45// Check number width. 46inline bool is_intn(unsigned n, int64_t x) { 47 VIXL_ASSERT((0 < n) && (n < 64)); 48 int64_t limit = INT64_C(1) << (n - 1); 49 return (-limit <= x) && (x < limit); 50} 51 52inline bool is_uintn(unsigned n, int64_t x) { 53 VIXL_ASSERT((0 < n) && (n < 64)); 54 return !(x >> n); 55} 56 57inline uint32_t truncate_to_intn(unsigned n, int64_t x) { 58 VIXL_ASSERT((0 < n) && (n < 64)); 59 return static_cast<uint32_t>(x & ((INT64_C(1) << n) - 1)); 60} 61 62#define INT_1_TO_63_LIST(V) \ 63V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8) \ 64V(9) V(10) V(11) V(12) V(13) V(14) V(15) V(16) \ 65V(17) V(18) V(19) V(20) V(21) V(22) V(23) V(24) \ 66V(25) V(26) V(27) V(28) V(29) V(30) V(31) V(32) \ 67V(33) V(34) V(35) V(36) V(37) V(38) V(39) V(40) \ 68V(41) V(42) V(43) V(44) V(45) V(46) V(47) V(48) \ 69V(49) V(50) V(51) V(52) V(53) V(54) V(55) V(56) \ 70V(57) V(58) V(59) V(60) V(61) V(62) V(63) 71 72#define DECLARE_IS_INT_N(N) \ 73inline bool is_int##N(int64_t x) { return is_intn(N, x); } 74#define DECLARE_IS_UINT_N(N) \ 75inline bool is_uint##N(int64_t x) { return is_uintn(N, x); } 76#define DECLARE_TRUNCATE_TO_INT_N(N) \ 77inline uint32_t truncate_to_int##N(int x) { return truncate_to_intn(N, x); } 78INT_1_TO_63_LIST(DECLARE_IS_INT_N) 79INT_1_TO_63_LIST(DECLARE_IS_UINT_N) 80INT_1_TO_63_LIST(DECLARE_TRUNCATE_TO_INT_N) 81#undef DECLARE_IS_INT_N 82#undef DECLARE_IS_UINT_N 83#undef DECLARE_TRUNCATE_TO_INT_N 84 85// Bit field extraction. 86inline uint32_t unsigned_bitextract_32(int msb, int lsb, uint32_t x) { 87 return (x >> lsb) & ((1 << (1 + msb - lsb)) - 1); 88} 89 90inline uint64_t unsigned_bitextract_64(int msb, int lsb, uint64_t x) { 91 return (x >> lsb) & ((static_cast<uint64_t>(1) << (1 + msb - lsb)) - 1); 92} 93 94inline int32_t signed_bitextract_32(int msb, int lsb, int32_t x) { 95 return (x << (31 - msb)) >> (lsb + 31 - msb); 96} 97 98inline int64_t signed_bitextract_64(int msb, int lsb, int64_t x) { 99 return (x << (63 - msb)) >> (lsb + 63 - msb); 100} 101 102// Floating point representation. 103uint32_t float_to_rawbits(float value); 104uint64_t double_to_rawbits(double value); 105float rawbits_to_float(uint32_t bits); 106double rawbits_to_double(uint64_t bits); 107 108uint32_t float_sign(float val); 109uint32_t float_exp(float val); 110uint32_t float_mantissa(float val); 111uint32_t double_sign(double val); 112uint32_t double_exp(double val); 113uint64_t double_mantissa(double val); 114 115float float_pack(uint32_t sign, uint32_t exp, uint32_t mantissa); 116double double_pack(uint64_t sign, uint64_t exp, uint64_t mantissa); 117 118// An fpclassify() function for 16-bit half-precision floats. 119int float16classify(float16 value); 120 121// NaN tests. 122inline bool IsSignallingNaN(double num) { 123 const uint64_t kFP64QuietNaNMask = UINT64_C(0x0008000000000000); 124 uint64_t raw = double_to_rawbits(num); 125 if (std::isnan(num) && ((raw & kFP64QuietNaNMask) == 0)) { 126 return true; 127 } 128 return false; 129} 130 131 132inline bool IsSignallingNaN(float num) { 133 const uint32_t kFP32QuietNaNMask = 0x00400000; 134 uint32_t raw = float_to_rawbits(num); 135 if (std::isnan(num) && ((raw & kFP32QuietNaNMask) == 0)) { 136 return true; 137 } 138 return false; 139} 140 141 142inline bool IsSignallingNaN(float16 num) { 143 const uint16_t kFP16QuietNaNMask = 0x0200; 144 return (float16classify(num) == FP_NAN) && 145 ((num & kFP16QuietNaNMask) == 0); 146} 147 148 149template <typename T> 150inline bool IsQuietNaN(T num) { 151 return std::isnan(num) && !IsSignallingNaN(num); 152} 153 154 155// Convert the NaN in 'num' to a quiet NaN. 156inline double ToQuietNaN(double num) { 157 const uint64_t kFP64QuietNaNMask = UINT64_C(0x0008000000000000); 158 VIXL_ASSERT(std::isnan(num)); 159 return rawbits_to_double(double_to_rawbits(num) | kFP64QuietNaNMask); 160} 161 162 163inline float ToQuietNaN(float num) { 164 const uint32_t kFP32QuietNaNMask = 0x00400000; 165 VIXL_ASSERT(std::isnan(num)); 166 return rawbits_to_float(float_to_rawbits(num) | kFP32QuietNaNMask); 167} 168 169 170// Fused multiply-add. 171inline double FusedMultiplyAdd(double op1, double op2, double a) { 172 return fma(op1, op2, a); 173} 174 175 176inline float FusedMultiplyAdd(float op1, float op2, float a) { 177 return fmaf(op1, op2, a); 178} 179 180 181inline uint64_t LowestSetBit(uint64_t value) { 182 return value & -value; 183} 184 185 186template<typename T> 187inline int HighestSetBitPosition(T value) { 188 VIXL_ASSERT(value != 0); 189 return (sizeof(value) * 8 - 1) - CountLeadingZeros(value); 190} 191 192 193template<typename V> 194inline int WhichPowerOf2(V value) { 195 VIXL_ASSERT(IsPowerOf2(value)); 196 return CountTrailingZeros(value); 197} 198 199 200unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size); 201 202 203template <typename T> 204T ReverseBits(T value) { 205 VIXL_ASSERT((sizeof(value) == 1) || (sizeof(value) == 2) || 206 (sizeof(value) == 4) || (sizeof(value) == 8)); 207 T result = 0; 208 for (unsigned i = 0; i < (sizeof(value) * 8); i++) { 209 result = (result << 1) | (value & 1); 210 value >>= 1; 211 } 212 return result; 213} 214 215 216template <typename T> 217T ReverseBytes(T value, int block_bytes_log2) { 218 VIXL_ASSERT((sizeof(value) == 4) || (sizeof(value) == 8)); 219 VIXL_ASSERT((1U << block_bytes_log2) <= sizeof(value)); 220 // Split the 64-bit value into an 8-bit array, where b[0] is the least 221 // significant byte, and b[7] is the most significant. 222 uint8_t bytes[8]; 223 uint64_t mask = UINT64_C(0xff00000000000000); 224 for (int i = 7; i >= 0; i--) { 225 bytes[i] = (static_cast<uint64_t>(value) & mask) >> (i * 8); 226 mask >>= 8; 227 } 228 229 // Permutation tables for REV instructions. 230 // permute_table[0] is used by REV16_x, REV16_w 231 // permute_table[1] is used by REV32_x, REV_w 232 // permute_table[2] is used by REV_x 233 VIXL_ASSERT((0 < block_bytes_log2) && (block_bytes_log2 < 4)); 234 static const uint8_t permute_table[3][8] = { {6, 7, 4, 5, 2, 3, 0, 1}, 235 {4, 5, 6, 7, 0, 1, 2, 3}, 236 {0, 1, 2, 3, 4, 5, 6, 7} }; 237 T result = 0; 238 for (int i = 0; i < 8; i++) { 239 result <<= 8; 240 result |= bytes[permute_table[block_bytes_log2 - 1][i]]; 241 } 242 return result; 243} 244 245 246// Pointer alignment 247// TODO: rename/refactor to make it specific to instructions. 248template<typename T> 249bool IsWordAligned(T pointer) { 250 VIXL_ASSERT(sizeof(pointer) == sizeof(intptr_t)); // NOLINT(runtime/sizeof) 251 return ((intptr_t)(pointer) & 3) == 0; 252} 253 254// Increment a pointer (up to 64 bits) until it has the specified alignment. 255template<class T> 256T AlignUp(T pointer, size_t alignment) { 257 // Use C-style casts to get static_cast behaviour for integral types (T), and 258 // reinterpret_cast behaviour for other types. 259 260 uint64_t pointer_raw = (uint64_t)pointer; 261 VIXL_STATIC_ASSERT(sizeof(pointer) <= sizeof(pointer_raw)); 262 263 size_t align_step = (alignment - pointer_raw) % alignment; 264 VIXL_ASSERT((pointer_raw + align_step) % alignment == 0); 265 266 return (T)(pointer_raw + align_step); 267} 268 269// Decrement a pointer (up to 64 bits) until it has the specified alignment. 270template<class T> 271T AlignDown(T pointer, size_t alignment) { 272 // Use C-style casts to get static_cast behaviour for integral types (T), and 273 // reinterpret_cast behaviour for other types. 274 275 uint64_t pointer_raw = (uint64_t)pointer; 276 VIXL_STATIC_ASSERT(sizeof(pointer) <= sizeof(pointer_raw)); 277 278 size_t align_step = pointer_raw % alignment; 279 VIXL_ASSERT((pointer_raw - align_step) % alignment == 0); 280 281 return (T)(pointer_raw - align_step); 282} 283 284} // namespace vixl 285 286#endif // VIXL_UTILS_H