cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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standard-vga.txt (2309B)


      1
      2QEMU Standard VGA
      3=================
      4
      5Exists in two variants, for isa and pci.
      6
      7command line switches:
      8    -vga std               [ picks isa for -M isapc, otherwise pci ]
      9    -device VGA            [ pci variant ]
     10    -device isa-vga        [ isa variant ]
     11    -device secondary-vga  [ legacy-free pci variant ]
     12
     13
     14PCI spec
     15--------
     16
     17Applies to the pci variant only for obvious reasons.
     18
     19PCI ID: 1234:1111
     20
     21PCI Region 0:
     22   Framebuffer memory, 16 MB in size (by default).
     23   Size is tunable via vga_mem_mb property.
     24
     25PCI Region 1:
     26   Reserved (so we have the option to make the framebuffer bar 64bit).
     27
     28PCI Region 2:
     29   MMIO bar, 4096 bytes in size (qemu 1.3+)
     30
     31PCI ROM Region:
     32   Holds the vgabios (qemu 0.14+).
     33
     34
     35The legacy-free variant has no ROM and has PCI_CLASS_DISPLAY_OTHER
     36instead of PCI_CLASS_DISPLAY_VGA.
     37
     38
     39IO ports used
     40-------------
     41
     42Doesn't apply to the legacy-free pci variant, use the MMIO bar instead.
     43
     4403c0 - 03df : standard vga ports
     4501ce        : bochs vbe interface index port
     4601cf        : bochs vbe interface data port (x86 only)
     4701d0        : bochs vbe interface data port
     48
     49
     50Memory regions used
     51-------------------
     52
     530xe0000000 : Framebuffer memory, isa variant only.
     54
     55The pci variant used to mirror the framebuffer bar here, qemu 0.14+
     56stops doing that (except when in -M pc-$old compat mode).
     57
     58
     59MMIO area spec
     60--------------
     61
     62Likewise applies to the pci variant only for obvious reasons.
     63
     640000 - 03ff : edid data blob.
     650400 - 041f : vga ioports (0x3c0 -> 0x3df), remapped 1:1.
     66              word access is supported, bytes are written
     67              in little endia order (aka index port first),
     68              so indexed registers can be updated with a
     69              single mmio write (and thus only one vmexit).
     700500 - 0515 : bochs dispi interface registers, mapped flat
     71              without index/data ports.  Use (index << 1)
     72              as offset for (16bit) register access.
     73
     740600 - 0607 : qemu extended registers.  qemu 2.2+ only.
     75              The pci revision is 2 (or greater) when
     76              these registers are present.  The registers
     77              are 32bit.
     78  0600      : qemu extended register region size, in bytes.
     79  0604      : framebuffer endianness register.
     80              - 0xbebebebe indicates big endian.
     81              - 0x1e1e1e1e indicates little endian.