cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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target-xtensa.rst (694B)

      1.. _Xtensa-System-emulator:
      2
      3Xtensa System emulator
      4----------------------
      5
      6Two executables cover simulation of both Xtensa endian options,
      7``qemu-system-xtensa`` and ``qemu-system-xtensaeb``. Two different
      8machine types are emulated:
      9
     10-  Xtensa emulator pseudo board \"sim\"
     11
     12-  Avnet LX60/LX110/LX200 board
     13
     14The sim pseudo board emulation provides an environment similar to one
     15provided by the proprietary Tensilica ISS. It supports:
     16
     17-  A range of Xtensa CPUs, default is the DC232B
     18
     19-  Console and filesystem access via semihosting calls
     20
     21The Avnet LX60/LX110/LX200 emulation supports:
     22
     23-  A range of Xtensa CPUs, default is the DC232B
     24
     25-  16550 UART
     26
     27-  OpenCores 10/100 Mbps Ethernet MAC