cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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avr-cpu.xml (2045B)

      1<?xml version="1.0"?>
      2<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
      3
      4     Copying and distribution of this file, with or without modification,
      5     are permitted in any medium without royalty provided the copyright
      6     notice and this notice are preserved.  -->
      7
      8<!-- Register numbers are hard-coded in order to maintain backward
      9     compatibility with older versions of tools that didn't use xml
     10     register descriptions.  -->
     11
     12<!DOCTYPE feature SYSTEM "gdb-target.dtd">
     13<feature name="org.gnu.gdb.riscv.cpu">
     14  <reg name="r0" bitsize="8" type="int" regnum="0"/>
     15  <reg name="r1" bitsize="8" type="int"/>
     16  <reg name="r2" bitsize="8" type="int"/>
     17  <reg name="r3" bitsize="8" type="int"/>
     18  <reg name="r4" bitsize="8" type="int"/>
     19  <reg name="r5" bitsize="8" type="int"/>
     20  <reg name="r6" bitsize="8" type="int"/>
     21  <reg name="r7" bitsize="8" type="int"/>
     22  <reg name="r8" bitsize="8" type="int"/>
     23  <reg name="r9" bitsize="8" type="int"/>
     24  <reg name="r10" bitsize="8" type="int"/>
     25  <reg name="r11" bitsize="8" type="int"/>
     26  <reg name="r12" bitsize="8" type="int"/>
     27  <reg name="r13" bitsize="8" type="int"/>
     28  <reg name="r14" bitsize="8" type="int"/>
     29  <reg name="r15" bitsize="8" type="int"/>
     30  <reg name="r16" bitsize="8" type="int"/>
     31  <reg name="r17" bitsize="8" type="int"/>
     32  <reg name="r18" bitsize="8" type="int"/>
     33  <reg name="r19" bitsize="8" type="int"/>
     34  <reg name="r20" bitsize="8" type="int"/>
     35  <reg name="r21" bitsize="8" type="int"/>
     36  <reg name="r22" bitsize="8" type="int"/>
     37  <reg name="r23" bitsize="8" type="int"/>
     38  <reg name="r24" bitsize="8" type="int"/>
     39  <reg name="r25" bitsize="8" type="int"/>
     40  <reg name="r26" bitsize="8" type="int"/>
     41  <reg name="r27" bitsize="8" type="int"/>
     42  <reg name="r28" bitsize="8" type="int"/>
     43  <reg name="r29" bitsize="8" type="int"/>
     44  <reg name="r30" bitsize="8" type="int"/>
     45  <reg name="r31" bitsize="8" type="int"/>
     46  <reg name="sreg" bitsize="8" type="int"/>
     47  <reg name="sp" bitsize="8" type="int"/>
     48  <reg name="pc" bitsize="8" type="int"/>
     49</feature>