cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

i386-64bit.xml (8175B)


      1<?xml version="1.0"?>
      2<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
      3
      4     Copying and distribution of this file, with or without modification,
      5     are permitted in any medium without royalty provided the copyright
      6     notice and this notice are preserved.  -->
      7
      8<!-- x86_64 64bit -->
      9
     10<!DOCTYPE target SYSTEM "gdb-target.dtd">
     11
     12<feature name="org.gnu.gdb.i386.core">
     13  <flags id="x64_eflags" size="4">
     14	<field name="" start="22" end="31"/>
     15	<field name="ID" start="21" end="21"/>
     16	<field name="VIP" start="20" end="20"/>
     17	<field name="VIF" start="19" end="19"/>
     18	<field name="AC" start="18" end="18"/>
     19	<field name="VM" start="17" end="17"/>
     20	<field name="RF" start="16" end="16"/>
     21	<field name="" start="15" end="15"/>
     22	<field name="NT" start="14" end="14"/>
     23	<field name="IOPL" start="12" end="13"/>
     24	<field name="OF" start="11" end="11"/>
     25	<field name="DF" start="10" end="10"/>
     26	<field name="IF" start="9" end="9"/>
     27	<field name="TF" start="8" end="8"/>
     28	<field name="SF" start="7" end="7"/>
     29	<field name="ZF" start="6" end="6"/>
     30	<field name="" start="5" end="5"/>
     31	<field name="AF" start="4" end="4"/>
     32	<field name="" start="3" end="3"/>
     33	<field name="PF" start="2" end="2"/>
     34	<field name="" start="1" end="1"/>
     35	<field name="CF" start="0" end="0"/>
     36  </flags>
     37
     38  <!-- General registers -->
     39
     40  <reg name="rax" bitsize="64" type="int64" regnum="0"/>
     41  <reg name="rbx" bitsize="64" type="int64"/>
     42  <reg name="rcx" bitsize="64" type="int64"/>
     43  <reg name="rdx" bitsize="64" type="int64"/>
     44  <reg name="rsi" bitsize="64" type="int64"/>
     45  <reg name="rdi" bitsize="64" type="int64"/>
     46  <reg name="rbp" bitsize="64" type="data_ptr"/>
     47  <reg name="rsp" bitsize="64" type="data_ptr"/>
     48  <reg name="r8" bitsize="64" type="int64"/>
     49  <reg name="r9" bitsize="64" type="int64"/>
     50  <reg name="r10" bitsize="64" type="int64"/>
     51  <reg name="r11" bitsize="64" type="int64"/>
     52  <reg name="r12" bitsize="64" type="int64"/>
     53  <reg name="r13" bitsize="64" type="int64"/>
     54  <reg name="r14" bitsize="64" type="int64"/>
     55  <reg name="r15" bitsize="64" type="int64"/>
     56
     57  <reg name="rip" bitsize="64" type="code_ptr"/>
     58  <reg name="eflags" bitsize="32" type="x64_eflags"/>
     59
     60  <!-- Segment registers -->
     61
     62  <reg name="cs" bitsize="32" type="int32"/>
     63  <reg name="ss" bitsize="32" type="int32"/>
     64  <reg name="ds" bitsize="32" type="int32"/>
     65  <reg name="es" bitsize="32" type="int32"/>
     66  <reg name="fs" bitsize="32" type="int32"/>
     67  <reg name="gs" bitsize="32" type="int32"/>
     68
     69  <!-- Segment descriptor caches and TLS base MSRs -->
     70
     71  <!--reg name="cs_base" bitsize="64" type="int64"/>
     72  <reg name="ss_base" bitsize="64" type="int64"/>
     73  <reg name="ds_base" bitsize="64" type="int64"/>
     74  <reg name="es_base" bitsize="64" type="int64"/-->
     75  <reg name="fs_base" bitsize="64" type="int64"/>
     76  <reg name="gs_base" bitsize="64" type="int64"/>
     77  <reg name="k_gs_base" bitsize="64" type="int64"/>
     78
     79  <!-- Control registers -->
     80
     81  <flags id="x64_cr0" size="8">
     82	<field name="PG" start="31" end="31"/>
     83	<field name="CD" start="30" end="30"/>
     84	<field name="NW" start="29" end="29"/>
     85	<field name="AM" start="18" end="18"/>
     86	<field name="WP" start="16" end="16"/>
     87	<field name="NE" start="5" end="5"/>
     88	<field name="ET" start="4" end="4"/>
     89	<field name="TS" start="3" end="3"/>
     90	<field name="EM" start="2" end="2"/>
     91	<field name="MP" start="1" end="1"/>
     92	<field name="PE" start="0" end="0"/>
     93  </flags>
     94
     95  <flags id="x64_cr3" size="8">
     96	<field name="PDBR" start="12" end="63"/>
     97	<!--field name="" start="3" end="11"/>
     98	<field name="WT" start="2" end="2"/>
     99	<field name="CD" start="1" end="1"/>
    100	<field name="" start="0" end="0"/-->
    101	<field name="PCID" start="0" end="11"/>
    102  </flags>
    103
    104  <flags id="x64_cr4" size="8">
    105	<field name="PKE" start="22" end="22"/>
    106	<field name="SMAP" start="21" end="21"/>
    107	<field name="SMEP" start="20" end="20"/>
    108	<field name="OSXSAVE" start="18" end="18"/>
    109	<field name="PCIDE" start="17" end="17"/>
    110	<field name="FSGSBASE" start="16" end="16"/>
    111	<field name="SMXE" start="14" end="14"/>
    112	<field name="VMXE" start="13" end="13"/>
    113	<field name="LA57" start="12" end="12"/>
    114	<field name="UMIP" start="11" end="11"/>
    115	<field name="OSXMMEXCPT" start="10" end="10"/>
    116	<field name="OSFXSR" start="9" end="9"/>
    117	<field name="PCE" start="8" end="8"/>
    118	<field name="PGE" start="7" end="7"/>
    119	<field name="MCE" start="6" end="6"/>
    120	<field name="PAE" start="5" end="5"/>
    121	<field name="PSE" start="4" end="4"/>
    122	<field name="DE" start="3" end="3"/>
    123	<field name="TSD" start="2" end="2"/>
    124	<field name="PVI" start="1" end="1"/>
    125	<field name="VME" start="0" end="0"/>
    126  </flags>
    127
    128  <flags id="x64_efer" size="8">
    129	<field name="TCE" start="15" end="15"/>
    130	<field name="FFXSR" start="14" end="14"/>
    131	<field name="LMSLE" start="13" end="13"/>
    132	<field name="SVME" start="12" end="12"/>
    133	<field name="NXE" start="11" end="11"/>
    134	<field name="LMA" start="10" end="10"/>
    135	<field name="LME" start="8" end="8"/>
    136	<field name="SCE" start="0" end="0"/>
    137  </flags>
    138
    139  <reg name="cr0" bitsize="64" type="x64_cr0"/>
    140  <reg name="cr2" bitsize="64" type="int64"/>
    141  <reg name="cr3" bitsize="64" type="x64_cr3"/>
    142  <reg name="cr4" bitsize="64" type="x64_cr4"/>
    143  <reg name="cr8" bitsize="64" type="int64"/>
    144  <reg name="efer" bitsize="64" type="x64_efer"/>
    145
    146  <!-- x87 FPU -->
    147
    148  <reg name="st0" bitsize="80" type="i387_ext"/>
    149  <reg name="st1" bitsize="80" type="i387_ext"/>
    150  <reg name="st2" bitsize="80" type="i387_ext"/>
    151  <reg name="st3" bitsize="80" type="i387_ext"/>
    152  <reg name="st4" bitsize="80" type="i387_ext"/>
    153  <reg name="st5" bitsize="80" type="i387_ext"/>
    154  <reg name="st6" bitsize="80" type="i387_ext"/>
    155  <reg name="st7" bitsize="80" type="i387_ext"/>
    156
    157  <reg name="fctrl" bitsize="32" type="int" group="float"/>
    158  <reg name="fstat" bitsize="32" type="int" group="float"/>
    159  <reg name="ftag" bitsize="32" type="int" group="float"/>
    160  <reg name="fiseg" bitsize="32" type="int" group="float"/>
    161  <reg name="fioff" bitsize="32" type="int" group="float"/>
    162  <reg name="foseg" bitsize="32" type="int" group="float"/>
    163  <reg name="fooff" bitsize="32" type="int" group="float"/>
    164  <reg name="fop" bitsize="32" type="int" group="float"/>
    165
    166  <vector id="v4f" type="ieee_single" count="4"/>
    167  <vector id="v2d" type="ieee_double" count="2"/>
    168  <vector id="v16i8" type="int8" count="16"/>
    169  <vector id="v8i16" type="int16" count="8"/>
    170  <vector id="v4i32" type="int32" count="4"/>
    171  <vector id="v2i64" type="int64" count="2"/>
    172  <union id="vec128">
    173	<field name="v4_float" type="v4f"/>
    174	<field name="v2_double" type="v2d"/>
    175	<field name="v16_int8" type="v16i8"/>
    176	<field name="v8_int16" type="v8i16"/>
    177	<field name="v4_int32" type="v4i32"/>
    178	<field name="v2_int64" type="v2i64"/>
    179	<field name="uint128" type="uint128"/>
    180  </union>
    181  <flags id="x64_mxcsr" size="4">
    182	<field name="IE" start="0" end="0"/>
    183	<field name="DE" start="1" end="1"/>
    184	<field name="ZE" start="2" end="2"/>
    185	<field name="OE" start="3" end="3"/>
    186	<field name="UE" start="4" end="4"/>
    187	<field name="PE" start="5" end="5"/>
    188	<field name="DAZ" start="6" end="6"/>
    189	<field name="IM" start="7" end="7"/>
    190	<field name="DM" start="8" end="8"/>
    191	<field name="ZM" start="9" end="9"/>
    192	<field name="OM" start="10" end="10"/>
    193	<field name="UM" start="11" end="11"/>
    194	<field name="PM" start="12" end="12"/>
    195	<field name="FZ" start="15" end="15"/>
    196  </flags>
    197
    198  <reg name="xmm0" bitsize="128" type="vec128"/>
    199  <reg name="xmm1" bitsize="128" type="vec128"/>
    200  <reg name="xmm2" bitsize="128" type="vec128"/>
    201  <reg name="xmm3" bitsize="128" type="vec128"/>
    202  <reg name="xmm4" bitsize="128" type="vec128"/>
    203  <reg name="xmm5" bitsize="128" type="vec128"/>
    204  <reg name="xmm6" bitsize="128" type="vec128"/>
    205  <reg name="xmm7" bitsize="128" type="vec128"/>
    206  <reg name="xmm8" bitsize="128" type="vec128"/>
    207  <reg name="xmm9" bitsize="128" type="vec128"/>
    208  <reg name="xmm10" bitsize="128" type="vec128"/>
    209  <reg name="xmm11" bitsize="128" type="vec128"/>
    210  <reg name="xmm12" bitsize="128" type="vec128"/>
    211  <reg name="xmm13" bitsize="128" type="vec128"/>
    212  <reg name="xmm14" bitsize="128" type="vec128"/>
    213  <reg name="xmm15" bitsize="128" type="vec128"/>
    214
    215  <reg name="mxcsr" bitsize="32" type="x64_mxcsr" group="vector"/>
    216</feature>