cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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s390-vx.xml (2506B)


      1<?xml version="1.0"?>
      2<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc.
      3
      4     Copying and distribution of this file, with or without modification,
      5     are permitted in any medium without royalty provided the copyright
      6     notice and this notice are preserved.  -->
      7
      8<!DOCTYPE feature SYSTEM "gdb-target.dtd">
      9<feature name="org.gnu.gdb.s390.vx">
     10  <vector id="v4f" type="ieee_single" count="4"/>
     11  <vector id="v2d" type="ieee_double" count="2"/>
     12  <vector id="v16i8" type="int8" count="16"/>
     13  <vector id="v8i16" type="int16" count="8"/>
     14  <vector id="v4i32" type="int32" count="4"/>
     15  <vector id="v2i64" type="int64" count="2"/>
     16  <union id="vec128">
     17    <field name="v4_float" type="v4f"/>
     18    <field name="v2_double" type="v2d"/>
     19    <field name="v16_int8" type="v16i8"/>
     20    <field name="v8_int16" type="v8i16"/>
     21    <field name="v4_int32" type="v4i32"/>
     22    <field name="v2_int64" type="v2i64"/>
     23    <field name="uint128" type="uint128"/>
     24  </union>
     25
     26  <reg name="v0l" bitsize="64" type="uint64"/>
     27  <reg name="v1l" bitsize="64" type="uint64"/>
     28  <reg name="v2l" bitsize="64" type="uint64"/>
     29  <reg name="v3l" bitsize="64" type="uint64"/>
     30  <reg name="v4l" bitsize="64" type="uint64"/>
     31  <reg name="v5l" bitsize="64" type="uint64"/>
     32  <reg name="v6l" bitsize="64" type="uint64"/>
     33  <reg name="v7l" bitsize="64" type="uint64"/>
     34  <reg name="v8l" bitsize="64" type="uint64"/>
     35  <reg name="v9l" bitsize="64" type="uint64"/>
     36  <reg name="v10l" bitsize="64" type="uint64"/>
     37  <reg name="v11l" bitsize="64" type="uint64"/>
     38  <reg name="v12l" bitsize="64" type="uint64"/>
     39  <reg name="v13l" bitsize="64" type="uint64"/>
     40  <reg name="v14l" bitsize="64" type="uint64"/>
     41  <reg name="v15l" bitsize="64" type="uint64"/>
     42
     43  <reg name="v16" bitsize="128" type="vec128"/>
     44  <reg name="v17" bitsize="128" type="vec128"/>
     45  <reg name="v18" bitsize="128" type="vec128"/>
     46  <reg name="v19" bitsize="128" type="vec128"/>
     47  <reg name="v20" bitsize="128" type="vec128"/>
     48  <reg name="v21" bitsize="128" type="vec128"/>
     49  <reg name="v22" bitsize="128" type="vec128"/>
     50  <reg name="v23" bitsize="128" type="vec128"/>
     51  <reg name="v24" bitsize="128" type="vec128"/>
     52  <reg name="v25" bitsize="128" type="vec128"/>
     53  <reg name="v26" bitsize="128" type="vec128"/>
     54  <reg name="v27" bitsize="128" type="vec128"/>
     55  <reg name="v28" bitsize="128" type="vec128"/>
     56  <reg name="v29" bitsize="128" type="vec128"/>
     57  <reg name="v30" bitsize="128" type="vec128"/>
     58  <reg name="v31" bitsize="128" type="vec128"/>
     59</feature>