cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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digic_boards.c (4554B)

      1/*
      2 * QEMU model of the Canon DIGIC boards (cameras indeed :).
      3 *
      4 * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
      5 *
      6 * This model is based on reverse engineering efforts
      7 * made by CHDK (http://chdk.wikia.com) and
      8 * Magic Lantern (http://www.magiclantern.fm) projects
      9 * contributors.
     10 *
     11 * See docs here:
     12 *   http://magiclantern.wikia.com/wiki/Register_Map
     13 *
     14 * This program is free software; you can redistribute it and/or modify
     15 * it under the terms of the GNU General Public License as published by
     16 * the Free Software Foundation; either version 2 of the License, or
     17 * (at your option) any later version.
     18 *
     19 * This program is distributed in the hope that it will be useful,
     20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
     22 * GNU General Public License for more details.
     23 *
     24 */
     25
     26#include "qemu/osdep.h"
     27#include "qapi/error.h"
     28#include "qemu-common.h"
     29#include "qemu/datadir.h"
     30#include "hw/boards.h"
     31#include "qemu/error-report.h"
     32#include "hw/arm/digic.h"
     33#include "hw/block/flash.h"
     34#include "hw/loader.h"
     35#include "sysemu/qtest.h"
     36#include "qemu/units.h"
     37#include "qemu/cutils.h"
     38
     39#define DIGIC4_ROM0_BASE      0xf0000000
     40#define DIGIC4_ROM1_BASE      0xf8000000
     41#define DIGIC4_ROM_MAX_SIZE   0x08000000
     42
     43typedef struct DigicBoard {
     44    void (*add_rom0)(DigicState *, hwaddr, const char *);
     45    const char *rom0_def_filename;
     46    void (*add_rom1)(DigicState *, hwaddr, const char *);
     47    const char *rom1_def_filename;
     48} DigicBoard;
     49
     50static void digic4_board_init(MachineState *machine, DigicBoard *board)
     51{
     52    Error *err = NULL;
     53    DigicState *s = DIGIC(object_new(TYPE_DIGIC));
     54    MachineClass *mc = MACHINE_GET_CLASS(machine);
     55
     56    if (machine->ram_size != mc->default_ram_size) {
     57        char *sz = size_to_str(mc->default_ram_size);
     58        error_report("Invalid RAM size, should be %s", sz);
     59        g_free(sz);
     60        exit(EXIT_FAILURE);
     61    }
     62
     63    if (!qdev_realize(DEVICE(s), NULL, &err)) {
     64        error_reportf_err(err, "Couldn't realize DIGIC SoC: ");
     65        exit(1);
     66    }
     67
     68    memory_region_add_subregion(get_system_memory(), 0, machine->ram);
     69
     70    if (board->add_rom0) {
     71        board->add_rom0(s, DIGIC4_ROM0_BASE,
     72                        machine->firmware ?: board->rom0_def_filename);
     73    }
     74
     75    if (board->add_rom1) {
     76        board->add_rom1(s, DIGIC4_ROM1_BASE,
     77                        machine->firmware ?: board->rom1_def_filename);
     78    }
     79}
     80
     81static void digic_load_rom(DigicState *s, hwaddr addr,
     82                           hwaddr max_size, const char *filename)
     83{
     84    target_long rom_size;
     85
     86    if (qtest_enabled()) {
     87        /* qtest runs no code so don't attempt a ROM load which
     88         * could fail and result in a spurious test failure.
     89         */
     90        return;
     91    }
     92
     93    if (filename) {
     94        char *fn = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename);
     95
     96        if (!fn) {
     97            error_report("Couldn't find rom image '%s'.", filename);
     98            exit(1);
     99        }
    100
    101        rom_size = load_image_targphys(fn, addr, max_size);
    102        if (rom_size < 0 || rom_size > max_size) {
    103            error_report("Couldn't load rom image '%s'.", filename);
    104            exit(1);
    105        }
    106        g_free(fn);
    107    }
    108}
    109
    110/*
    111 * Samsung K8P3215UQB
    112 * 64M Bit (4Mx16) Page Mode / Multi-Bank NOR Flash Memory
    113 */
    114static void digic4_add_k8p3215uqb_rom(DigicState *s, hwaddr addr,
    115                                      const char *filename)
    116{
    117#define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024)
    118#define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024)
    119
    120    pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE,
    121                          NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
    122                          DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
    123                          4,
    124                          0x00EC, 0x007E, 0x0003, 0x0001,
    125                          0x0555, 0x2aa, 0);
    126
    127    digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, filename);
    128}
    129
    130static DigicBoard digic4_board_canon_a1100 = {
    131    .add_rom1 = digic4_add_k8p3215uqb_rom,
    132    .rom1_def_filename = "canon-a1100-rom1.bin",
    133};
    134
    135static void canon_a1100_init(MachineState *machine)
    136{
    137    digic4_board_init(machine, &digic4_board_canon_a1100);
    138}
    139
    140static void canon_a1100_machine_init(MachineClass *mc)
    141{
    142    mc->desc = "Canon PowerShot A1100 IS (ARM946)";
    143    mc->init = &canon_a1100_init;
    144    mc->ignore_memory_transaction_failures = true;
    145    mc->default_ram_size = 64 * MiB;
    146    mc->default_ram_id = "ram";
    147}
    148
    149DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init)