cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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mcimx6ul-evk.c (2370B)

      1/*
      2 * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net>
      3 *
      4 * MCIMX6UL_EVK Board System emulation.
      5 *
      6 * This code is licensed under the GPL, version 2 or later.
      7 * See the file `COPYING' in the top level directory.
      8 *
      9 * It (partially) emulates a mcimx6ul_evk board, with a Freescale
     10 * i.MX6ul SoC
     11 */
     12
     13#include "qemu/osdep.h"
     14#include "qapi/error.h"
     15#include "hw/arm/fsl-imx6ul.h"
     16#include "hw/boards.h"
     17#include "hw/qdev-properties.h"
     18#include "qemu/error-report.h"
     19#include "sysemu/qtest.h"
     20
     21static void mcimx6ul_evk_init(MachineState *machine)
     22{
     23    static struct arm_boot_info boot_info;
     24    FslIMX6ULState *s;
     25    int i;
     26
     27    if (machine->ram_size > FSL_IMX6UL_MMDC_SIZE) {
     28        error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
     29                     machine->ram_size, FSL_IMX6UL_MMDC_SIZE);
     30        exit(1);
     31    }
     32
     33    boot_info = (struct arm_boot_info) {
     34        .loader_start = FSL_IMX6UL_MMDC_ADDR,
     35        .board_id = -1,
     36        .ram_size = machine->ram_size,
     37        .nb_cpus = machine->smp.cpus,
     38    };
     39
     40    s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL));
     41    object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
     42    object_property_set_uint(OBJECT(s), "fec1-phy-num", 2, &error_fatal);
     43    object_property_set_uint(OBJECT(s), "fec2-phy-num", 1, &error_fatal);
     44    qdev_realize(DEVICE(s), NULL, &error_fatal);
     45
     46    memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR,
     47                                machine->ram);
     48
     49    for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) {
     50        BusState *bus;
     51        DeviceState *carddev;
     52        DriveInfo *di;
     53        BlockBackend *blk;
     54
     55        di = drive_get_next(IF_SD);
     56        blk = di ? blk_by_legacy_dinfo(di) : NULL;
     57        bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus");
     58        carddev = qdev_new(TYPE_SD_CARD);
     59        qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
     60        qdev_realize_and_unref(carddev, bus, &error_fatal);
     61    }
     62
     63    if (!qtest_enabled()) {
     64        arm_load_kernel(&s->cpu, machine, &boot_info);
     65    }
     66}
     67
     68static void mcimx6ul_evk_machine_init(MachineClass *mc)
     69{
     70    mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex-A7)";
     71    mc->init = mcimx6ul_evk_init;
     72    mc->max_cpus = FSL_IMX6UL_NUM_CPUS;
     73    mc->default_ram_id = "mcimx6ul-evk.ram";
     74}
     75DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init)