cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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orangepi.c (4367B)

      1/*
      2 * Orange Pi emulation
      3 *
      4 * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
      5 *
      6 * This program is free software: you can redistribute it and/or modify
      7 * it under the terms of the GNU General Public License as published by
      8 * the Free Software Foundation, either version 2 of the License, or
      9 * (at your option) any later version.
     10 *
     11 * This program is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14 * GNU General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU General Public License
     17 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
     18 */
     19
     20#include "qemu/osdep.h"
     21#include "qemu/units.h"
     22#include "exec/address-spaces.h"
     23#include "qapi/error.h"
     24#include "hw/boards.h"
     25#include "hw/qdev-properties.h"
     26#include "hw/arm/allwinner-h3.h"
     27
     28static struct arm_boot_info orangepi_binfo = {
     29    .nb_cpus = AW_H3_NUM_CPUS,
     30};
     31
     32static void orangepi_init(MachineState *machine)
     33{
     34    AwH3State *h3;
     35    DriveInfo *di;
     36    BlockBackend *blk;
     37    BusState *bus;
     38    DeviceState *carddev;
     39
     40    /* BIOS is not supported by this board */
     41    if (machine->firmware) {
     42        error_report("BIOS not supported for this machine");
     43        exit(1);
     44    }
     45
     46    /* This board has fixed size RAM */
     47    if (machine->ram_size != 1 * GiB) {
     48        error_report("This machine can only be used with 1GiB of RAM");
     49        exit(1);
     50    }
     51
     52    /* Only allow Cortex-A7 for this board */
     53    if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
     54        error_report("This board can only be used with cortex-a7 CPU");
     55        exit(1);
     56    }
     57
     58    h3 = AW_H3(object_new(TYPE_AW_H3));
     59    object_property_add_child(OBJECT(machine), "soc", OBJECT(h3));
     60    object_unref(OBJECT(h3));
     61
     62    /* Setup timer properties */
     63    object_property_set_int(OBJECT(h3), "clk0-freq", 32768, &error_abort);
     64    object_property_set_int(OBJECT(h3), "clk1-freq", 24 * 1000 * 1000,
     65                            &error_abort);
     66
     67    /* Setup SID properties. Currently using a default fixed SID identifier. */
     68    if (qemu_uuid_is_null(&h3->sid.identifier)) {
     69        qdev_prop_set_string(DEVICE(h3), "identifier",
     70                             "02c00081-1111-2222-3333-000044556677");
     71    } else if (ldl_be_p(&h3->sid.identifier.data[0]) != 0x02c00081) {
     72        warn_report("Security Identifier value does not include H3 prefix");
     73    }
     74
     75    /* Setup EMAC properties */
     76    object_property_set_int(OBJECT(&h3->emac), "phy-addr", 1, &error_abort);
     77
     78    /* DRAMC */
     79    object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_DEV_SDRAM],
     80                             &error_abort);
     81    object_property_set_int(OBJECT(h3), "ram-size", machine->ram_size / MiB,
     82                            &error_abort);
     83
     84    /* Mark H3 object realized */
     85    qdev_realize(DEVICE(h3), NULL, &error_abort);
     86
     87    /* Retrieve SD bus */
     88    di = drive_get_next(IF_SD);
     89    blk = di ? blk_by_legacy_dinfo(di) : NULL;
     90    bus = qdev_get_child_bus(DEVICE(h3), "sd-bus");
     91
     92    /* Plug in SD card */
     93    carddev = qdev_new(TYPE_SD_CARD);
     94    qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
     95    qdev_realize_and_unref(carddev, bus, &error_fatal);
     96
     97    /* SDRAM */
     98    memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_DEV_SDRAM],
     99                                machine->ram);
    100
    101    /* Load target kernel or start using BootROM */
    102    if (!machine->kernel_filename && blk && blk_is_available(blk)) {
    103        /* Use Boot ROM to copy data from SD card to SRAM */
    104        allwinner_h3_bootrom_setup(h3, blk);
    105    }
    106    orangepi_binfo.loader_start = h3->memmap[AW_H3_DEV_SDRAM];
    107    orangepi_binfo.ram_size = machine->ram_size;
    108    arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo);
    109}
    110
    111static void orangepi_machine_init(MachineClass *mc)
    112{
    113    mc->desc = "Orange Pi PC (Cortex-A7)";
    114    mc->init = orangepi_init;
    115    mc->block_default_type = IF_SD;
    116    mc->units_per_default_bus = 1;
    117    mc->min_cpus = AW_H3_NUM_CPUS;
    118    mc->max_cpus = AW_H3_NUM_CPUS;
    119    mc->default_cpus = AW_H3_NUM_CPUS;
    120    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
    121    mc->default_ram_size = 1 * GiB;
    122    mc->default_ram_id = "orangepi.ram";
    123}
    124
    125DEFINE_MACHINE("orangepi-pc", orangepi_machine_init)