spitz.c (39549B)
1/* 2 * PXA270-based Clamshell PDA platforms. 3 * 4 * Copyright (c) 2006 Openedhand Ltd. 5 * Written by Andrzej Zaborowski <balrog@zabor.org> 6 * 7 * This code is licensed under the GNU GPL v2. 8 * 9 * Contributions after 2012-01-13 are licensed under the terms of the 10 * GNU GPL, version 2 or (at your option) any later version. 11 */ 12 13#include "qemu/osdep.h" 14#include "qapi/error.h" 15#include "hw/arm/pxa.h" 16#include "hw/arm/boot.h" 17#include "sysemu/runstate.h" 18#include "sysemu/sysemu.h" 19#include "hw/pcmcia.h" 20#include "hw/qdev-properties.h" 21#include "hw/i2c/i2c.h" 22#include "hw/irq.h" 23#include "hw/ssi/ssi.h" 24#include "hw/block/flash.h" 25#include "qemu/timer.h" 26#include "qemu/log.h" 27#include "hw/arm/sharpsl.h" 28#include "ui/console.h" 29#include "hw/audio/wm8750.h" 30#include "audio/audio.h" 31#include "hw/boards.h" 32#include "hw/sysbus.h" 33#include "hw/adc/max111x.h" 34#include "migration/vmstate.h" 35#include "exec/address-spaces.h" 36#include "cpu.h" 37#include "qom/object.h" 38 39enum spitz_model_e { spitz, akita, borzoi, terrier }; 40 41struct SpitzMachineClass { 42 MachineClass parent; 43 enum spitz_model_e model; 44 int arm_id; 45}; 46 47struct SpitzMachineState { 48 MachineState parent; 49 PXA2xxState *mpu; 50 DeviceState *mux; 51 DeviceState *lcdtg; 52 DeviceState *ads7846; 53 DeviceState *max1111; 54 DeviceState *scp0; 55 DeviceState *scp1; 56 DeviceState *misc_gpio; 57}; 58 59#define TYPE_SPITZ_MACHINE "spitz-common" 60OBJECT_DECLARE_TYPE(SpitzMachineState, SpitzMachineClass, SPITZ_MACHINE) 61 62#define zaurus_printf(format, ...) \ 63 fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__) 64 65/* Spitz Flash */ 66#define FLASH_BASE 0x0c000000 67#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ 68#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ 69#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ 70#define FLASH_ECCCNTR 0x0c /* ECC byte counter */ 71#define FLASH_ECCCLRR 0x10 /* Clear ECC */ 72#define FLASH_FLASHIO 0x14 /* Flash I/O */ 73#define FLASH_FLASHCTL 0x18 /* Flash Control */ 74 75#define FLASHCTL_CE0 (1 << 0) 76#define FLASHCTL_CLE (1 << 1) 77#define FLASHCTL_ALE (1 << 2) 78#define FLASHCTL_WP (1 << 3) 79#define FLASHCTL_CE1 (1 << 4) 80#define FLASHCTL_RYBY (1 << 5) 81#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) 82 83#define TYPE_SL_NAND "sl-nand" 84OBJECT_DECLARE_SIMPLE_TYPE(SLNANDState, SL_NAND) 85 86struct SLNANDState { 87 SysBusDevice parent_obj; 88 89 MemoryRegion iomem; 90 DeviceState *nand; 91 uint8_t ctl; 92 uint8_t manf_id; 93 uint8_t chip_id; 94 ECCState ecc; 95}; 96 97static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size) 98{ 99 SLNANDState *s = (SLNANDState *) opaque; 100 int ryby; 101 102 switch (addr) { 103#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) 104 case FLASH_ECCLPLB: 105 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | 106 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); 107 108#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) 109 case FLASH_ECCLPUB: 110 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | 111 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); 112 113 case FLASH_ECCCP: 114 return s->ecc.cp; 115 116 case FLASH_ECCCNTR: 117 return s->ecc.count & 0xff; 118 119 case FLASH_FLASHCTL: 120 nand_getpins(s->nand, &ryby); 121 if (ryby) 122 return s->ctl | FLASHCTL_RYBY; 123 else 124 return s->ctl; 125 126 case FLASH_FLASHIO: 127 if (size == 4) { 128 return ecc_digest(&s->ecc, nand_getio(s->nand)) | 129 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16); 130 } 131 return ecc_digest(&s->ecc, nand_getio(s->nand)); 132 133 default: 134 qemu_log_mask(LOG_GUEST_ERROR, 135 "sl_read: bad register offset 0x%02" HWADDR_PRIx "\n", 136 addr); 137 } 138 return 0; 139} 140 141static void sl_write(void *opaque, hwaddr addr, 142 uint64_t value, unsigned size) 143{ 144 SLNANDState *s = (SLNANDState *) opaque; 145 146 switch (addr) { 147 case FLASH_ECCCLRR: 148 /* Value is ignored. */ 149 ecc_reset(&s->ecc); 150 break; 151 152 case FLASH_FLASHCTL: 153 s->ctl = value & 0xff & ~FLASHCTL_RYBY; 154 nand_setpins(s->nand, 155 s->ctl & FLASHCTL_CLE, 156 s->ctl & FLASHCTL_ALE, 157 s->ctl & FLASHCTL_NCE, 158 s->ctl & FLASHCTL_WP, 159 0); 160 break; 161 162 case FLASH_FLASHIO: 163 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff)); 164 break; 165 166 default: 167 qemu_log_mask(LOG_GUEST_ERROR, 168 "sl_write: bad register offset 0x%02" HWADDR_PRIx "\n", 169 addr); 170 } 171} 172 173enum { 174 FLASH_128M, 175 FLASH_1024M, 176}; 177 178static const MemoryRegionOps sl_ops = { 179 .read = sl_read, 180 .write = sl_write, 181 .endianness = DEVICE_NATIVE_ENDIAN, 182}; 183 184static void sl_flash_register(PXA2xxState *cpu, int size) 185{ 186 DeviceState *dev; 187 188 dev = qdev_new(TYPE_SL_NAND); 189 190 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); 191 if (size == FLASH_128M) 192 qdev_prop_set_uint8(dev, "chip_id", 0x73); 193 else if (size == FLASH_1024M) 194 qdev_prop_set_uint8(dev, "chip_id", 0xf1); 195 196 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 197 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); 198} 199 200static void sl_nand_init(Object *obj) 201{ 202 SLNANDState *s = SL_NAND(obj); 203 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 204 205 s->ctl = 0; 206 207 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40); 208 sysbus_init_mmio(dev, &s->iomem); 209} 210 211static void sl_nand_realize(DeviceState *dev, Error **errp) 212{ 213 SLNANDState *s = SL_NAND(dev); 214 DriveInfo *nand; 215 216 /* FIXME use a qdev drive property instead of drive_get() */ 217 nand = drive_get(IF_MTD, 0, 0); 218 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL, 219 s->manf_id, s->chip_id); 220} 221 222/* Spitz Keyboard */ 223 224#define SPITZ_KEY_STROBE_NUM 11 225#define SPITZ_KEY_SENSE_NUM 7 226 227static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { 228 12, 17, 91, 34, 36, 38, 39 229}; 230 231static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { 232 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 233}; 234 235/* Eighth additional row maps the special keys */ 236static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { 237 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, 238 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, 239 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, 240 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, 241 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, 242 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, 243 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, 244 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, 245}; 246 247#define SPITZ_GPIO_AK_INT 13 /* Remote control */ 248#define SPITZ_GPIO_SYNC 16 /* Sync button */ 249#define SPITZ_GPIO_ON_KEY 95 /* Power button */ 250#define SPITZ_GPIO_SWA 97 /* Lid */ 251#define SPITZ_GPIO_SWB 96 /* Tablet mode */ 252 253/* The special buttons are mapped to unused keys */ 254static const int spitz_gpiomap[5] = { 255 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, 256 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, 257}; 258 259#define TYPE_SPITZ_KEYBOARD "spitz-keyboard" 260OBJECT_DECLARE_SIMPLE_TYPE(SpitzKeyboardState, SPITZ_KEYBOARD) 261 262struct SpitzKeyboardState { 263 SysBusDevice parent_obj; 264 265 qemu_irq sense[SPITZ_KEY_SENSE_NUM]; 266 qemu_irq gpiomap[5]; 267 int keymap[0x80]; 268 uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; 269 uint16_t strobe_state; 270 uint16_t sense_state; 271 272 uint16_t pre_map[0x100]; 273 uint16_t modifiers; 274 uint16_t imodifiers; 275 uint8_t fifo[16]; 276 int fifopos, fifolen; 277 QEMUTimer *kbdtimer; 278}; 279 280static void spitz_keyboard_sense_update(SpitzKeyboardState *s) 281{ 282 int i; 283 uint16_t strobe, sense = 0; 284 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { 285 strobe = s->keyrow[i] & s->strobe_state; 286 if (strobe) { 287 sense |= 1 << i; 288 if (!(s->sense_state & (1 << i))) 289 qemu_irq_raise(s->sense[i]); 290 } else if (s->sense_state & (1 << i)) 291 qemu_irq_lower(s->sense[i]); 292 } 293 294 s->sense_state = sense; 295} 296 297static void spitz_keyboard_strobe(void *opaque, int line, int level) 298{ 299 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 300 301 if (level) 302 s->strobe_state |= 1 << line; 303 else 304 s->strobe_state &= ~(1 << line); 305 spitz_keyboard_sense_update(s); 306} 307 308static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) 309{ 310 int spitz_keycode = s->keymap[keycode & 0x7f]; 311 if (spitz_keycode == -1) 312 return; 313 314 /* Handle the additional keys */ 315 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { 316 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); 317 return; 318 } 319 320 if (keycode & 0x80) 321 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); 322 else 323 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); 324 325 spitz_keyboard_sense_update(s); 326} 327 328#define SPITZ_MOD_SHIFT (1 << 7) 329#define SPITZ_MOD_CTRL (1 << 8) 330#define SPITZ_MOD_FN (1 << 9) 331 332#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c 333 334static void spitz_keyboard_handler(void *opaque, int keycode) 335{ 336 SpitzKeyboardState *s = opaque; 337 uint16_t code; 338 int mapcode; 339 switch (keycode) { 340 case 0x2a: /* Left Shift */ 341 s->modifiers |= 1; 342 break; 343 case 0xaa: 344 s->modifiers &= ~1; 345 break; 346 case 0x36: /* Right Shift */ 347 s->modifiers |= 2; 348 break; 349 case 0xb6: 350 s->modifiers &= ~2; 351 break; 352 case 0x1d: /* Control */ 353 s->modifiers |= 4; 354 break; 355 case 0x9d: 356 s->modifiers &= ~4; 357 break; 358 case 0x38: /* Alt */ 359 s->modifiers |= 8; 360 break; 361 case 0xb8: 362 s->modifiers &= ~8; 363 break; 364 } 365 366 code = s->pre_map[mapcode = ((s->modifiers & 3) ? 367 (keycode | SPITZ_MOD_SHIFT) : 368 (keycode & ~SPITZ_MOD_SHIFT))]; 369 370 if (code != mapcode) { 371#if 0 372 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) { 373 QUEUE_KEY(0x2a | (keycode & 0x80)); 374 } 375 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) { 376 QUEUE_KEY(0x1d | (keycode & 0x80)); 377 } 378 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) { 379 QUEUE_KEY(0x38 | (keycode & 0x80)); 380 } 381 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) { 382 QUEUE_KEY(0x2a | (~keycode & 0x80)); 383 } 384 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) { 385 QUEUE_KEY(0x36 | (~keycode & 0x80)); 386 } 387#else 388 if (keycode & 0x80) { 389 if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) 390 QUEUE_KEY(0x2a | 0x80); 391 if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) 392 QUEUE_KEY(0x1d | 0x80); 393 if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) 394 QUEUE_KEY(0x38 | 0x80); 395 if ((s->imodifiers & 0x10) && (s->modifiers & 1)) 396 QUEUE_KEY(0x2a); 397 if ((s->imodifiers & 0x20) && (s->modifiers & 2)) 398 QUEUE_KEY(0x36); 399 s->imodifiers = 0; 400 } else { 401 if ((code & SPITZ_MOD_SHIFT) && 402 !((s->modifiers | s->imodifiers) & 1)) { 403 QUEUE_KEY(0x2a); 404 s->imodifiers |= 1; 405 } 406 if ((code & SPITZ_MOD_CTRL) && 407 !((s->modifiers | s->imodifiers) & 4)) { 408 QUEUE_KEY(0x1d); 409 s->imodifiers |= 4; 410 } 411 if ((code & SPITZ_MOD_FN) && 412 !((s->modifiers | s->imodifiers) & 8)) { 413 QUEUE_KEY(0x38); 414 s->imodifiers |= 8; 415 } 416 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) && 417 !(s->imodifiers & 0x10)) { 418 QUEUE_KEY(0x2a | 0x80); 419 s->imodifiers |= 0x10; 420 } 421 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) && 422 !(s->imodifiers & 0x20)) { 423 QUEUE_KEY(0x36 | 0x80); 424 s->imodifiers |= 0x20; 425 } 426 } 427#endif 428 } 429 430 QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); 431} 432 433static void spitz_keyboard_tick(void *opaque) 434{ 435 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 436 437 if (s->fifolen) { 438 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); 439 s->fifolen --; 440 if (s->fifopos >= 16) 441 s->fifopos = 0; 442 } 443 444 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 445 NANOSECONDS_PER_SECOND / 32); 446} 447 448static void spitz_keyboard_pre_map(SpitzKeyboardState *s) 449{ 450 int i; 451 for (i = 0; i < 0x100; i ++) 452 s->pre_map[i] = i; 453 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */ 454 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */ 455 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */ 456 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */ 457 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */ 458 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */ 459 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */ 460 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */ 461 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */ 462 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */ 463 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */ 464 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */ 465 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */ 466 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */ 467 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */ 468 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */ 469 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */ 470 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */ 471 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */ 472 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */ 473 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */ 474 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */ 475 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */ 476 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */ 477 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */ 478 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */ 479 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */ 480 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */ 481 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */ 482 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */ 483 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */ 484 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */ 485 486 s->modifiers = 0; 487 s->imodifiers = 0; 488 s->fifopos = 0; 489 s->fifolen = 0; 490} 491 492#undef SPITZ_MOD_SHIFT 493#undef SPITZ_MOD_CTRL 494#undef SPITZ_MOD_FN 495 496static int spitz_keyboard_post_load(void *opaque, int version_id) 497{ 498 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; 499 500 /* Release all pressed keys */ 501 memset(s->keyrow, 0, sizeof(s->keyrow)); 502 spitz_keyboard_sense_update(s); 503 s->modifiers = 0; 504 s->imodifiers = 0; 505 s->fifopos = 0; 506 s->fifolen = 0; 507 508 return 0; 509} 510 511static void spitz_keyboard_register(PXA2xxState *cpu) 512{ 513 int i; 514 DeviceState *dev; 515 SpitzKeyboardState *s; 516 517 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); 518 s = SPITZ_KEYBOARD(dev); 519 520 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) 521 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); 522 523 for (i = 0; i < 5; i ++) 524 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); 525 526 if (!graphic_rotate) 527 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); 528 529 for (i = 0; i < 5; i++) 530 qemu_set_irq(s->gpiomap[i], 0); 531 532 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) 533 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], 534 qdev_get_gpio_in(dev, i)); 535 536 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); 537 538 qemu_add_kbd_event_handler(spitz_keyboard_handler, s); 539} 540 541static void spitz_keyboard_init(Object *obj) 542{ 543 DeviceState *dev = DEVICE(obj); 544 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj); 545 int i, j; 546 547 for (i = 0; i < 0x80; i ++) 548 s->keymap[i] = -1; 549 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) 550 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) 551 if (spitz_keymap[i][j] != -1) 552 s->keymap[spitz_keymap[i][j]] = (i << 4) | j; 553 554 spitz_keyboard_pre_map(s); 555 556 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); 557 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM); 558} 559 560static void spitz_keyboard_realize(DeviceState *dev, Error **errp) 561{ 562 SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); 563 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s); 564} 565 566/* LCD backlight controller */ 567 568#define LCDTG_RESCTL 0x00 569#define LCDTG_PHACTRL 0x01 570#define LCDTG_DUTYCTRL 0x02 571#define LCDTG_POWERREG0 0x03 572#define LCDTG_POWERREG1 0x04 573#define LCDTG_GPOR3 0x05 574#define LCDTG_PICTRL 0x06 575#define LCDTG_POLCTRL 0x07 576 577#define TYPE_SPITZ_LCDTG "spitz-lcdtg" 578OBJECT_DECLARE_SIMPLE_TYPE(SpitzLCDTG, SPITZ_LCDTG) 579 580struct SpitzLCDTG { 581 SSIPeripheral ssidev; 582 uint32_t bl_intensity; 583 uint32_t bl_power; 584}; 585 586static void spitz_bl_update(SpitzLCDTG *s) 587{ 588 if (s->bl_power && s->bl_intensity) 589 zaurus_printf("LCD Backlight now at %u/63\n", s->bl_intensity); 590 else 591 zaurus_printf("LCD Backlight now off\n"); 592} 593 594static inline void spitz_bl_bit5(void *opaque, int line, int level) 595{ 596 SpitzLCDTG *s = opaque; 597 int prev = s->bl_intensity; 598 599 if (level) 600 s->bl_intensity &= ~0x20; 601 else 602 s->bl_intensity |= 0x20; 603 604 if (s->bl_power && prev != s->bl_intensity) 605 spitz_bl_update(s); 606} 607 608static inline void spitz_bl_power(void *opaque, int line, int level) 609{ 610 SpitzLCDTG *s = opaque; 611 s->bl_power = !!level; 612 spitz_bl_update(s); 613} 614 615static uint32_t spitz_lcdtg_transfer(SSIPeripheral *dev, uint32_t value) 616{ 617 SpitzLCDTG *s = SPITZ_LCDTG(dev); 618 int addr; 619 addr = value >> 5; 620 value &= 0x1f; 621 622 switch (addr) { 623 case LCDTG_RESCTL: 624 if (value) 625 zaurus_printf("LCD in QVGA mode\n"); 626 else 627 zaurus_printf("LCD in VGA mode\n"); 628 break; 629 630 case LCDTG_DUTYCTRL: 631 s->bl_intensity &= ~0x1f; 632 s->bl_intensity |= value; 633 if (s->bl_power) 634 spitz_bl_update(s); 635 break; 636 637 case LCDTG_POWERREG0: 638 /* Set common voltage to M62332FP */ 639 break; 640 } 641 return 0; 642} 643 644static void spitz_lcdtg_realize(SSIPeripheral *ssi, Error **errp) 645{ 646 SpitzLCDTG *s = SPITZ_LCDTG(ssi); 647 DeviceState *dev = DEVICE(s); 648 649 s->bl_power = 0; 650 s->bl_intensity = 0x20; 651 652 qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1); 653 qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1); 654} 655 656/* SSP devices */ 657 658#define CORGI_SSP_PORT 2 659 660#define SPITZ_GPIO_LCDCON_CS 53 661#define SPITZ_GPIO_ADS7846_CS 14 662#define SPITZ_GPIO_MAX1111_CS 20 663#define SPITZ_GPIO_TP_INT 11 664 665#define TYPE_CORGI_SSP "corgi-ssp" 666OBJECT_DECLARE_SIMPLE_TYPE(CorgiSSPState, CORGI_SSP) 667 668/* "Demux" the signal based on current chipselect */ 669struct CorgiSSPState { 670 SSIPeripheral ssidev; 671 SSIBus *bus[3]; 672 uint32_t enable[3]; 673}; 674 675static uint32_t corgi_ssp_transfer(SSIPeripheral *dev, uint32_t value) 676{ 677 CorgiSSPState *s = CORGI_SSP(dev); 678 int i; 679 680 for (i = 0; i < 3; i++) { 681 if (s->enable[i]) { 682 return ssi_transfer(s->bus[i], value); 683 } 684 } 685 return 0; 686} 687 688static void corgi_ssp_gpio_cs(void *opaque, int line, int level) 689{ 690 CorgiSSPState *s = (CorgiSSPState *)opaque; 691 assert(line >= 0 && line < 3); 692 s->enable[line] = !level; 693} 694 695#define MAX1111_BATT_VOLT 1 696#define MAX1111_BATT_TEMP 2 697#define MAX1111_ACIN_VOLT 3 698 699#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ 700#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ 701#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ 702 703static void corgi_ssp_realize(SSIPeripheral *d, Error **errp) 704{ 705 DeviceState *dev = DEVICE(d); 706 CorgiSSPState *s = CORGI_SSP(d); 707 708 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3); 709 s->bus[0] = ssi_create_bus(dev, "ssi0"); 710 s->bus[1] = ssi_create_bus(dev, "ssi1"); 711 s->bus[2] = ssi_create_bus(dev, "ssi2"); 712} 713 714static void spitz_ssp_attach(SpitzMachineState *sms) 715{ 716 void *bus; 717 718 sms->mux = ssi_create_peripheral(sms->mpu->ssp[CORGI_SSP_PORT - 1], 719 TYPE_CORGI_SSP); 720 721 bus = qdev_get_child_bus(sms->mux, "ssi0"); 722 sms->lcdtg = ssi_create_peripheral(bus, TYPE_SPITZ_LCDTG); 723 724 bus = qdev_get_child_bus(sms->mux, "ssi1"); 725 sms->ads7846 = ssi_create_peripheral(bus, "ads7846"); 726 qdev_connect_gpio_out(sms->ads7846, 0, 727 qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT)); 728 729 bus = qdev_get_child_bus(sms->mux, "ssi2"); 730 sms->max1111 = qdev_new(TYPE_MAX_1111); 731 qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */, 732 SPITZ_BATTERY_VOLT); 733 qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0); 734 qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */, 735 SPITZ_CHARGEON_ACIN); 736 ssi_realize_and_unref(sms->max1111, bus, &error_fatal); 737 738 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS, 739 qdev_get_gpio_in(sms->mux, 0)); 740 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS, 741 qdev_get_gpio_in(sms->mux, 1)); 742 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS, 743 qdev_get_gpio_in(sms->mux, 2)); 744} 745 746/* CF Microdrive */ 747 748static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) 749{ 750 PCMCIACardState *md; 751 DriveInfo *dinfo; 752 753 dinfo = drive_get(IF_IDE, 0, 0); 754 if (!dinfo || dinfo->media_cd) 755 return; 756 md = dscm1xxxx_init(dinfo); 757 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); 758} 759 760/* Wm8750 and Max7310 on I2C */ 761 762#define AKITA_MAX_ADDR 0x18 763#define SPITZ_WM_ADDRL 0x1b 764#define SPITZ_WM_ADDRH 0x1a 765 766#define SPITZ_GPIO_WM 5 767 768static void spitz_wm8750_addr(void *opaque, int line, int level) 769{ 770 I2CSlave *wm = (I2CSlave *) opaque; 771 if (level) 772 i2c_slave_set_address(wm, SPITZ_WM_ADDRH); 773 else 774 i2c_slave_set_address(wm, SPITZ_WM_ADDRL); 775} 776 777static void spitz_i2c_setup(PXA2xxState *cpu) 778{ 779 /* Attach the CPU on one end of our I2C bus. */ 780 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]); 781 782 DeviceState *wm; 783 784 /* Attach a WM8750 to the bus */ 785 wm = DEVICE(i2c_slave_create_simple(bus, TYPE_WM8750, 0)); 786 787 spitz_wm8750_addr(wm, 0, 0); 788 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, 789 qemu_allocate_irq(spitz_wm8750_addr, wm, 0)); 790 /* .. and to the sound interface. */ 791 cpu->i2s->opaque = wm; 792 cpu->i2s->codec_out = wm8750_dac_dat; 793 cpu->i2s->codec_in = wm8750_adc_dat; 794 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); 795} 796 797static void spitz_akita_i2c_setup(PXA2xxState *cpu) 798{ 799 /* Attach a Max7310 to Akita I2C bus. */ 800 i2c_slave_create_simple(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", 801 AKITA_MAX_ADDR); 802} 803 804/* Other peripherals */ 805 806/* 807 * Encapsulation of some miscellaneous GPIO line behaviour for the Spitz boards. 808 * 809 * QEMU interface: 810 * + named GPIO inputs "green-led", "orange-led", "charging", "discharging": 811 * these currently just print messages that the line has been signalled 812 * + named GPIO input "adc-temp-on": set to cause the battery-temperature 813 * value to be passed to the max111x ADC 814 * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x 815 */ 816#define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" 817OBJECT_DECLARE_SIMPLE_TYPE(SpitzMiscGPIOState, SPITZ_MISC_GPIO) 818 819struct SpitzMiscGPIOState { 820 SysBusDevice parent_obj; 821 822 qemu_irq adc_value; 823}; 824 825static void spitz_misc_charging(void *opaque, int n, int level) 826{ 827 zaurus_printf("Charging %s.\n", level ? "off" : "on"); 828} 829 830static void spitz_misc_discharging(void *opaque, int n, int level) 831{ 832 zaurus_printf("Discharging %s.\n", level ? "off" : "on"); 833} 834 835static void spitz_misc_green_led(void *opaque, int n, int level) 836{ 837 zaurus_printf("Green LED %s.\n", level ? "off" : "on"); 838} 839 840static void spitz_misc_orange_led(void *opaque, int n, int level) 841{ 842 zaurus_printf("Orange LED %s.\n", level ? "off" : "on"); 843} 844 845static void spitz_misc_adc_temp(void *opaque, int n, int level) 846{ 847 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(opaque); 848 int batt_temp = level ? SPITZ_BATTERY_TEMP : 0; 849 850 qemu_set_irq(s->adc_value, batt_temp); 851} 852 853static void spitz_misc_gpio_init(Object *obj) 854{ 855 SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(obj); 856 DeviceState *dev = DEVICE(obj); 857 858 qdev_init_gpio_in_named(dev, spitz_misc_charging, "charging", 1); 859 qdev_init_gpio_in_named(dev, spitz_misc_discharging, "discharging", 1); 860 qdev_init_gpio_in_named(dev, spitz_misc_green_led, "green-led", 1); 861 qdev_init_gpio_in_named(dev, spitz_misc_orange_led, "orange-led", 1); 862 qdev_init_gpio_in_named(dev, spitz_misc_adc_temp, "adc-temp-on", 1); 863 864 qdev_init_gpio_out_named(dev, &s->adc_value, "adc-temp", 1); 865} 866 867#define SPITZ_SCP_LED_GREEN 1 868#define SPITZ_SCP_JK_B 2 869#define SPITZ_SCP_CHRG_ON 3 870#define SPITZ_SCP_MUTE_L 4 871#define SPITZ_SCP_MUTE_R 5 872#define SPITZ_SCP_CF_POWER 6 873#define SPITZ_SCP_LED_ORANGE 7 874#define SPITZ_SCP_JK_A 8 875#define SPITZ_SCP_ADC_TEMP_ON 9 876#define SPITZ_SCP2_IR_ON 1 877#define SPITZ_SCP2_AKIN_PULLUP 2 878#define SPITZ_SCP2_BACKLIGHT_CONT 7 879#define SPITZ_SCP2_BACKLIGHT_ON 8 880#define SPITZ_SCP2_MIC_BIAS 9 881 882static void spitz_scoop_gpio_setup(SpitzMachineState *sms) 883{ 884 DeviceState *miscdev = sysbus_create_simple(TYPE_SPITZ_MISC_GPIO, -1, NULL); 885 886 sms->misc_gpio = miscdev; 887 888 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON, 889 qdev_get_gpio_in_named(miscdev, "charging", 0)); 890 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B, 891 qdev_get_gpio_in_named(miscdev, "discharging", 0)); 892 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN, 893 qdev_get_gpio_in_named(miscdev, "green-led", 0)); 894 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE, 895 qdev_get_gpio_in_named(miscdev, "orange-led", 0)); 896 qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON, 897 qdev_get_gpio_in_named(miscdev, "adc-temp-on", 0)); 898 qdev_connect_gpio_out_named(miscdev, "adc-temp", 0, 899 qdev_get_gpio_in(sms->max1111, MAX1111_BATT_TEMP)); 900 901 if (sms->scp1) { 902 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT, 903 qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0)); 904 qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON, 905 qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0)); 906 } 907} 908 909#define SPITZ_GPIO_HSYNC 22 910#define SPITZ_GPIO_SD_DETECT 9 911#define SPITZ_GPIO_SD_WP 81 912#define SPITZ_GPIO_ON_RESET 89 913#define SPITZ_GPIO_BAT_COVER 90 914#define SPITZ_GPIO_CF1_IRQ 105 915#define SPITZ_GPIO_CF1_CD 94 916#define SPITZ_GPIO_CF2_IRQ 106 917#define SPITZ_GPIO_CF2_CD 93 918 919static int spitz_hsync; 920 921static void spitz_lcd_hsync_handler(void *opaque, int line, int level) 922{ 923 PXA2xxState *cpu = (PXA2xxState *) opaque; 924 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); 925 spitz_hsync ^= 1; 926} 927 928static void spitz_reset(void *opaque, int line, int level) 929{ 930 if (level) { 931 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 932 } 933} 934 935static void spitz_gpio_setup(PXA2xxState *cpu, int slots) 936{ 937 qemu_irq lcd_hsync; 938 qemu_irq reset; 939 940 /* 941 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status 942 * read to satisfy broken guests that poll-wait for hsync. 943 * Simulating a real hsync event would be less practical and 944 * wouldn't guarantee that a guest ever exits the loop. 945 */ 946 spitz_hsync = 0; 947 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0); 948 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); 949 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); 950 951 /* MMC/SD host */ 952 pxa2xx_mmci_handlers(cpu->mmc, 953 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), 954 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); 955 956 /* Battery lock always closed */ 957 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); 958 959 /* Handle reset */ 960 reset = qemu_allocate_irq(spitz_reset, cpu, 0); 961 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset); 962 963 /* PCMCIA signals: card's IRQ and Card-Detect */ 964 if (slots >= 1) 965 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], 966 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), 967 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); 968 if (slots >= 2) 969 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], 970 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), 971 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); 972} 973 974/* Board init. */ 975#define SPITZ_RAM 0x04000000 976#define SPITZ_ROM 0x00800000 977 978static struct arm_boot_info spitz_binfo = { 979 .loader_start = PXA2XX_SDRAM_BASE, 980 .ram_size = 0x04000000, 981}; 982 983static void spitz_common_init(MachineState *machine) 984{ 985 SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine); 986 SpitzMachineState *sms = SPITZ_MACHINE(machine); 987 enum spitz_model_e model = smc->model; 988 PXA2xxState *mpu; 989 MemoryRegion *address_space_mem = get_system_memory(); 990 MemoryRegion *rom = g_new(MemoryRegion, 1); 991 992 /* Setup CPU & memory */ 993 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, 994 machine->cpu_type); 995 sms->mpu = mpu; 996 997 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); 998 999 memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); 1000 memory_region_add_subregion(address_space_mem, 0, rom); 1001 1002 /* Setup peripherals */ 1003 spitz_keyboard_register(mpu); 1004 1005 spitz_ssp_attach(sms); 1006 1007 sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); 1008 if (model != akita) { 1009 sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); 1010 } else { 1011 sms->scp1 = NULL; 1012 } 1013 1014 spitz_scoop_gpio_setup(sms); 1015 1016 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2); 1017 1018 spitz_i2c_setup(mpu); 1019 1020 if (model == akita) 1021 spitz_akita_i2c_setup(mpu); 1022 1023 if (model == terrier) 1024 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */ 1025 spitz_microdrive_attach(mpu, 1); 1026 else if (model != akita) 1027 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */ 1028 spitz_microdrive_attach(mpu, 0); 1029 1030 spitz_binfo.board_id = smc->arm_id; 1031 arm_load_kernel(mpu->cpu, machine, &spitz_binfo); 1032 sl_bootparam_write(SL_PXA_PARAM_BASE); 1033} 1034 1035static void spitz_common_class_init(ObjectClass *oc, void *data) 1036{ 1037 MachineClass *mc = MACHINE_CLASS(oc); 1038 1039 mc->block_default_type = IF_IDE; 1040 mc->ignore_memory_transaction_failures = true; 1041 mc->init = spitz_common_init; 1042} 1043 1044static const TypeInfo spitz_common_info = { 1045 .name = TYPE_SPITZ_MACHINE, 1046 .parent = TYPE_MACHINE, 1047 .abstract = true, 1048 .instance_size = sizeof(SpitzMachineState), 1049 .class_size = sizeof(SpitzMachineClass), 1050 .class_init = spitz_common_class_init, 1051}; 1052 1053static void akitapda_class_init(ObjectClass *oc, void *data) 1054{ 1055 MachineClass *mc = MACHINE_CLASS(oc); 1056 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1057 1058 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)"; 1059 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1060 smc->model = akita; 1061 smc->arm_id = 0x2e8; 1062} 1063 1064static const TypeInfo akitapda_type = { 1065 .name = MACHINE_TYPE_NAME("akita"), 1066 .parent = TYPE_SPITZ_MACHINE, 1067 .class_init = akitapda_class_init, 1068}; 1069 1070static void spitzpda_class_init(ObjectClass *oc, void *data) 1071{ 1072 MachineClass *mc = MACHINE_CLASS(oc); 1073 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1074 1075 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)"; 1076 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1077 smc->model = spitz; 1078 smc->arm_id = 0x2c9; 1079} 1080 1081static const TypeInfo spitzpda_type = { 1082 .name = MACHINE_TYPE_NAME("spitz"), 1083 .parent = TYPE_SPITZ_MACHINE, 1084 .class_init = spitzpda_class_init, 1085}; 1086 1087static void borzoipda_class_init(ObjectClass *oc, void *data) 1088{ 1089 MachineClass *mc = MACHINE_CLASS(oc); 1090 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1091 1092 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)"; 1093 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0"); 1094 smc->model = borzoi; 1095 smc->arm_id = 0x33f; 1096} 1097 1098static const TypeInfo borzoipda_type = { 1099 .name = MACHINE_TYPE_NAME("borzoi"), 1100 .parent = TYPE_SPITZ_MACHINE, 1101 .class_init = borzoipda_class_init, 1102}; 1103 1104static void terrierpda_class_init(ObjectClass *oc, void *data) 1105{ 1106 MachineClass *mc = MACHINE_CLASS(oc); 1107 SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc); 1108 1109 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)"; 1110 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5"); 1111 smc->model = terrier; 1112 smc->arm_id = 0x33f; 1113} 1114 1115static const TypeInfo terrierpda_type = { 1116 .name = MACHINE_TYPE_NAME("terrier"), 1117 .parent = TYPE_SPITZ_MACHINE, 1118 .class_init = terrierpda_class_init, 1119}; 1120 1121static void spitz_machine_init(void) 1122{ 1123 type_register_static(&spitz_common_info); 1124 type_register_static(&akitapda_type); 1125 type_register_static(&spitzpda_type); 1126 type_register_static(&borzoipda_type); 1127 type_register_static(&terrierpda_type); 1128} 1129 1130type_init(spitz_machine_init) 1131 1132static bool is_version_0(void *opaque, int version_id) 1133{ 1134 return version_id == 0; 1135} 1136 1137static const VMStateDescription vmstate_sl_nand_info = { 1138 .name = "sl-nand", 1139 .version_id = 0, 1140 .minimum_version_id = 0, 1141 .fields = (VMStateField[]) { 1142 VMSTATE_UINT8(ctl, SLNANDState), 1143 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState), 1144 VMSTATE_END_OF_LIST(), 1145 }, 1146}; 1147 1148static Property sl_nand_properties[] = { 1149 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG), 1150 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), 1151 DEFINE_PROP_END_OF_LIST(), 1152}; 1153 1154static void sl_nand_class_init(ObjectClass *klass, void *data) 1155{ 1156 DeviceClass *dc = DEVICE_CLASS(klass); 1157 1158 dc->vmsd = &vmstate_sl_nand_info; 1159 device_class_set_props(dc, sl_nand_properties); 1160 dc->realize = sl_nand_realize; 1161 /* Reason: init() method uses drive_get() */ 1162 dc->user_creatable = false; 1163} 1164 1165static const TypeInfo sl_nand_info = { 1166 .name = TYPE_SL_NAND, 1167 .parent = TYPE_SYS_BUS_DEVICE, 1168 .instance_size = sizeof(SLNANDState), 1169 .instance_init = sl_nand_init, 1170 .class_init = sl_nand_class_init, 1171}; 1172 1173static const VMStateDescription vmstate_spitz_kbd = { 1174 .name = "spitz-keyboard", 1175 .version_id = 1, 1176 .minimum_version_id = 0, 1177 .post_load = spitz_keyboard_post_load, 1178 .fields = (VMStateField[]) { 1179 VMSTATE_UINT16(sense_state, SpitzKeyboardState), 1180 VMSTATE_UINT16(strobe_state, SpitzKeyboardState), 1181 VMSTATE_UNUSED_TEST(is_version_0, 5), 1182 VMSTATE_END_OF_LIST(), 1183 }, 1184}; 1185 1186static void spitz_keyboard_class_init(ObjectClass *klass, void *data) 1187{ 1188 DeviceClass *dc = DEVICE_CLASS(klass); 1189 1190 dc->vmsd = &vmstate_spitz_kbd; 1191 dc->realize = spitz_keyboard_realize; 1192} 1193 1194static const TypeInfo spitz_keyboard_info = { 1195 .name = TYPE_SPITZ_KEYBOARD, 1196 .parent = TYPE_SYS_BUS_DEVICE, 1197 .instance_size = sizeof(SpitzKeyboardState), 1198 .instance_init = spitz_keyboard_init, 1199 .class_init = spitz_keyboard_class_init, 1200}; 1201 1202static const VMStateDescription vmstate_corgi_ssp_regs = { 1203 .name = "corgi-ssp", 1204 .version_id = 2, 1205 .minimum_version_id = 2, 1206 .fields = (VMStateField[]) { 1207 VMSTATE_SSI_PERIPHERAL(ssidev, CorgiSSPState), 1208 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3), 1209 VMSTATE_END_OF_LIST(), 1210 } 1211}; 1212 1213static void corgi_ssp_class_init(ObjectClass *klass, void *data) 1214{ 1215 DeviceClass *dc = DEVICE_CLASS(klass); 1216 SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass); 1217 1218 k->realize = corgi_ssp_realize; 1219 k->transfer = corgi_ssp_transfer; 1220 dc->vmsd = &vmstate_corgi_ssp_regs; 1221} 1222 1223static const TypeInfo corgi_ssp_info = { 1224 .name = TYPE_CORGI_SSP, 1225 .parent = TYPE_SSI_PERIPHERAL, 1226 .instance_size = sizeof(CorgiSSPState), 1227 .class_init = corgi_ssp_class_init, 1228}; 1229 1230static const VMStateDescription vmstate_spitz_lcdtg_regs = { 1231 .name = "spitz-lcdtg", 1232 .version_id = 1, 1233 .minimum_version_id = 1, 1234 .fields = (VMStateField[]) { 1235 VMSTATE_SSI_PERIPHERAL(ssidev, SpitzLCDTG), 1236 VMSTATE_UINT32(bl_intensity, SpitzLCDTG), 1237 VMSTATE_UINT32(bl_power, SpitzLCDTG), 1238 VMSTATE_END_OF_LIST(), 1239 } 1240}; 1241 1242static void spitz_lcdtg_class_init(ObjectClass *klass, void *data) 1243{ 1244 DeviceClass *dc = DEVICE_CLASS(klass); 1245 SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass); 1246 1247 k->realize = spitz_lcdtg_realize; 1248 k->transfer = spitz_lcdtg_transfer; 1249 dc->vmsd = &vmstate_spitz_lcdtg_regs; 1250} 1251 1252static const TypeInfo spitz_lcdtg_info = { 1253 .name = TYPE_SPITZ_LCDTG, 1254 .parent = TYPE_SSI_PERIPHERAL, 1255 .instance_size = sizeof(SpitzLCDTG), 1256 .class_init = spitz_lcdtg_class_init, 1257}; 1258 1259static const TypeInfo spitz_misc_gpio_info = { 1260 .name = TYPE_SPITZ_MISC_GPIO, 1261 .parent = TYPE_SYS_BUS_DEVICE, 1262 .instance_size = sizeof(SpitzMiscGPIOState), 1263 .instance_init = spitz_misc_gpio_init, 1264 /* 1265 * No class_init required: device has no internal state so does not 1266 * need to set up reset or vmstate, and does not have a realize method. 1267 */ 1268}; 1269 1270static void spitz_register_types(void) 1271{ 1272 type_register_static(&corgi_ssp_info); 1273 type_register_static(&spitz_lcdtg_info); 1274 type_register_static(&spitz_keyboard_info); 1275 type_register_static(&sl_nand_info); 1276 type_register_static(&spitz_misc_gpio_info); 1277} 1278 1279type_init(spitz_register_types)