es1370.c (27493B)
1/* 2 * QEMU ES1370 emulation 3 * 4 * Copyright (c) 2005 Vassili Karpov (malc) 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25/* #define DEBUG_ES1370 */ 26/* #define VERBOSE_ES1370 */ 27#define SILENT_ES1370 28 29#include "qemu/osdep.h" 30#include "hw/audio/soundhw.h" 31#include "audio/audio.h" 32#include "hw/pci/pci.h" 33#include "migration/vmstate.h" 34#include "qemu/module.h" 35#include "sysemu/dma.h" 36#include "qom/object.h" 37 38/* Missing stuff: 39 SCTRL_P[12](END|ST)INC 40 SCTRL_P1SCTRLD 41 SCTRL_P2DACSEN 42 CTRL_DAC_SYNC 43 MIDI 44 non looped mode 45 surely more 46*/ 47 48/* 49 Following macros and samplerate array were copied verbatim from 50 Linux kernel 2.4.30: drivers/sound/es1370.c 51 52 Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch) 53*/ 54 55/* Start blatant GPL violation */ 56 57#define ES1370_REG_CONTROL 0x00 58#define ES1370_REG_STATUS 0x04 59#define ES1370_REG_UART_DATA 0x08 60#define ES1370_REG_UART_STATUS 0x09 61#define ES1370_REG_UART_CONTROL 0x09 62#define ES1370_REG_UART_TEST 0x0a 63#define ES1370_REG_MEMPAGE 0x0c 64#define ES1370_REG_CODEC 0x10 65#define ES1370_REG_SERIAL_CONTROL 0x20 66#define ES1370_REG_DAC1_SCOUNT 0x24 67#define ES1370_REG_DAC2_SCOUNT 0x28 68#define ES1370_REG_ADC_SCOUNT 0x2c 69 70#define ES1370_REG_DAC1_FRAMEADR 0xc30 71#define ES1370_REG_DAC1_FRAMECNT 0xc34 72#define ES1370_REG_DAC2_FRAMEADR 0xc38 73#define ES1370_REG_DAC2_FRAMECNT 0xc3c 74#define ES1370_REG_ADC_FRAMEADR 0xd30 75#define ES1370_REG_ADC_FRAMECNT 0xd34 76#define ES1370_REG_PHANTOM_FRAMEADR 0xd38 77#define ES1370_REG_PHANTOM_FRAMECNT 0xd3c 78 79static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 }; 80 81#define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2) 82#define DAC2_DIVTOSR(x) (1411200/((x)+2)) 83 84#define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */ 85#define CTRL_XCTL1 0x40000000 /* electret mic bias */ 86#define CTRL_OPEN 0x20000000 /* no function, can be read and written */ 87#define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */ 88#define CTRL_SH_PCLKDIV 16 89#define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */ 90#define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */ 91#define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */ 92#define CTRL_SH_WTSRSEL 12 93#define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */ 94#define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */ 95#define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */ 96#define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */ 97#define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */ 98#define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */ 99#define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */ 100#define CTRL_ADC_EN 0x00000010 /* enable ADC */ 101#define CTRL_UART_EN 0x00000008 /* enable MIDI uart */ 102#define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */ 103#define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */ 104#define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */ 105 106#define STAT_INTR 0x80000000 /* wired or of all interrupt bits */ 107#define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */ 108#define STAT_CBUSY 0x00000200 /* 1 = codec busy */ 109#define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */ 110#define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */ 111#define STAT_SH_VC 5 112#define STAT_MCCB 0x00000010 /* CCB int pending */ 113#define STAT_UART 0x00000008 /* UART int pending */ 114#define STAT_DAC1 0x00000004 /* DAC1 int pending */ 115#define STAT_DAC2 0x00000002 /* DAC2 int pending */ 116#define STAT_ADC 0x00000001 /* ADC int pending */ 117 118#define USTAT_RXINT 0x80 /* UART rx int pending */ 119#define USTAT_TXINT 0x04 /* UART tx int pending */ 120#define USTAT_TXRDY 0x02 /* UART tx ready */ 121#define USTAT_RXRDY 0x01 /* UART rx ready */ 122 123#define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */ 124#define UCTRL_TXINTEN 0x60 /* TX int enable field mask */ 125#define UCTRL_ENA_TXINT 0x20 /* enable TX int */ 126#define UCTRL_CNTRL 0x03 /* control field */ 127#define UCTRL_CNTRL_SWR 0x03 /* software reset command */ 128 129#define SCTRL_P2ENDINC 0x00380000 /* */ 130#define SCTRL_SH_P2ENDINC 19 131#define SCTRL_P2STINC 0x00070000 /* */ 132#define SCTRL_SH_P2STINC 16 133#define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */ 134#define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */ 135#define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */ 136#define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */ 137#define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */ 138#define SCTRL_R1INTEN 0x00000400 /* enable interrupt */ 139#define SCTRL_P2INTEN 0x00000200 /* enable interrupt */ 140#define SCTRL_P1INTEN 0x00000100 /* enable interrupt */ 141#define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */ 142#define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */ 143#define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */ 144#define SCTRL_R1SMB 0x00000010 /* 1 = stereo */ 145#define SCTRL_R1FMT 0x00000030 /* format mask */ 146#define SCTRL_SH_R1FMT 4 147#define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */ 148#define SCTRL_P2SMB 0x00000004 /* 1 = stereo */ 149#define SCTRL_P2FMT 0x0000000c /* format mask */ 150#define SCTRL_SH_P2FMT 2 151#define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */ 152#define SCTRL_P1SMB 0x00000001 /* 1 = stereo */ 153#define SCTRL_P1FMT 0x00000003 /* format mask */ 154#define SCTRL_SH_P1FMT 0 155 156/* End blatant GPL violation */ 157 158#define NB_CHANNELS 3 159#define DAC1_CHANNEL 0 160#define DAC2_CHANNEL 1 161#define ADC_CHANNEL 2 162 163static void es1370_dac1_callback (void *opaque, int free); 164static void es1370_dac2_callback (void *opaque, int free); 165static void es1370_adc_callback (void *opaque, int avail); 166 167#ifdef DEBUG_ES1370 168 169#define ldebug(...) AUD_log ("es1370", __VA_ARGS__) 170 171static void print_ctl (uint32_t val) 172{ 173 char buf[1024]; 174 175 buf[0] = '\0'; 176#define a(n) if (val & CTRL_##n) strcat (buf, " "#n) 177 a (ADC_STOP); 178 a (XCTL1); 179 a (OPEN); 180 a (MSFMTSEL); 181 a (M_SBB); 182 a (DAC_SYNC); 183 a (CCB_INTRM); 184 a (M_CB); 185 a (XCTL0); 186 a (BREQ); 187 a (DAC1_EN); 188 a (DAC2_EN); 189 a (ADC_EN); 190 a (UART_EN); 191 a (JYSTK_EN); 192 a (CDC_EN); 193 a (SERR_DIS); 194#undef a 195 AUD_log ("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n", 196 (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV, 197 DAC2_DIVTOSR ((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), 198 dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], 199 buf); 200} 201 202static void print_sctl (uint32_t val) 203{ 204 static const char *fmt_names[] = {"8M", "8S", "16M", "16S"}; 205 char buf[1024]; 206 207 buf[0] = '\0'; 208 209#define a(n) if (val & SCTRL_##n) strcat (buf, " "#n) 210#define b(n) if (!(val & SCTRL_##n)) strcat (buf, " "#n) 211 b (R1LOOPSEL); 212 b (P2LOOPSEL); 213 b (P1LOOPSEL); 214 a (P2PAUSE); 215 a (P1PAUSE); 216 a (R1INTEN); 217 a (P2INTEN); 218 a (P1INTEN); 219 a (P1SCTRLD); 220 a (P2DACSEN); 221 if (buf[0]) { 222 strcat (buf, "\n "); 223 } 224 else { 225 buf[0] = ' '; 226 buf[1] = '\0'; 227 } 228#undef b 229#undef a 230 AUD_log ("es1370", 231 "%s" 232 "p2_end_inc %d, p2_st_inc %d, r1_fmt %s, p2_fmt %s, p1_fmt %s\n", 233 buf, 234 (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC, 235 (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC, 236 fmt_names [(val >> SCTRL_SH_R1FMT) & 3], 237 fmt_names [(val >> SCTRL_SH_P2FMT) & 3], 238 fmt_names [(val >> SCTRL_SH_P1FMT) & 3] 239 ); 240} 241#else 242#define ldebug(...) 243#define print_ctl(...) 244#define print_sctl(...) 245#endif 246 247#ifdef VERBOSE_ES1370 248#define dolog(...) AUD_log ("es1370", __VA_ARGS__) 249#else 250#define dolog(...) 251#endif 252 253#ifndef SILENT_ES1370 254#define lwarn(...) AUD_log ("es1370: warning", __VA_ARGS__) 255#else 256#define lwarn(...) 257#endif 258 259struct chan { 260 uint32_t shift; 261 uint32_t leftover; 262 uint32_t scount; 263 uint32_t frame_addr; 264 uint32_t frame_cnt; 265}; 266 267struct ES1370State { 268 PCIDevice dev; 269 QEMUSoundCard card; 270 MemoryRegion io; 271 struct chan chan[NB_CHANNELS]; 272 SWVoiceOut *dac_voice[2]; 273 SWVoiceIn *adc_voice; 274 275 uint32_t ctl; 276 uint32_t status; 277 uint32_t mempage; 278 uint32_t codec; 279 uint32_t sctl; 280}; 281typedef struct ES1370State ES1370State; 282 283struct chan_bits { 284 uint32_t ctl_en; 285 uint32_t stat_int; 286 uint32_t sctl_pause; 287 uint32_t sctl_inten; 288 uint32_t sctl_fmt; 289 uint32_t sctl_sh_fmt; 290 uint32_t sctl_loopsel; 291 void (*calc_freq) (ES1370State *s, uint32_t ctl, 292 uint32_t *old_freq, uint32_t *new_freq); 293}; 294 295#define TYPE_ES1370 "ES1370" 296OBJECT_DECLARE_SIMPLE_TYPE(ES1370State, ES1370) 297 298static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, 299 uint32_t *old_freq, uint32_t *new_freq); 300static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, 301 uint32_t *old_freq, 302 uint32_t *new_freq); 303 304static const struct chan_bits es1370_chan_bits[] = { 305 {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN, 306 SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL, 307 es1370_dac1_calc_freq}, 308 309 {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN, 310 SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL, 311 es1370_dac2_and_adc_calc_freq}, 312 313 {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN, 314 SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL, 315 es1370_dac2_and_adc_calc_freq} 316}; 317 318static void es1370_update_status (ES1370State *s, uint32_t new_status) 319{ 320 uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC); 321 322 if (level) { 323 s->status = new_status | STAT_INTR; 324 } 325 else { 326 s->status = new_status & ~STAT_INTR; 327 } 328 pci_set_irq(&s->dev, !!level); 329} 330 331static void es1370_reset (ES1370State *s) 332{ 333 size_t i; 334 335 s->ctl = 1; 336 s->status = 0x60; 337 s->mempage = 0; 338 s->codec = 0; 339 s->sctl = 0; 340 341 for (i = 0; i < NB_CHANNELS; ++i) { 342 struct chan *d = &s->chan[i]; 343 d->scount = 0; 344 d->leftover = 0; 345 if (i == ADC_CHANNEL) { 346 AUD_close_in (&s->card, s->adc_voice); 347 s->adc_voice = NULL; 348 } 349 else { 350 AUD_close_out (&s->card, s->dac_voice[i]); 351 s->dac_voice[i] = NULL; 352 } 353 } 354 pci_irq_deassert(&s->dev); 355} 356 357static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl) 358{ 359 uint32_t new_status = s->status; 360 361 if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) { 362 new_status &= ~STAT_DAC1; 363 } 364 365 if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) { 366 new_status &= ~STAT_DAC2; 367 } 368 369 if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) { 370 new_status &= ~STAT_ADC; 371 } 372 373 if (new_status != s->status) { 374 es1370_update_status (s, new_status); 375 } 376} 377 378static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, 379 uint32_t *old_freq, uint32_t *new_freq) 380 381{ 382 *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; 383 *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; 384} 385 386static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, 387 uint32_t *old_freq, 388 uint32_t *new_freq) 389 390{ 391 uint32_t old_pclkdiv, new_pclkdiv; 392 393 new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; 394 old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; 395 *new_freq = DAC2_DIVTOSR (new_pclkdiv); 396 *old_freq = DAC2_DIVTOSR (old_pclkdiv); 397} 398 399static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl) 400{ 401 size_t i; 402 uint32_t old_freq, new_freq, old_fmt, new_fmt; 403 404 for (i = 0; i < NB_CHANNELS; ++i) { 405 struct chan *d = &s->chan[i]; 406 const struct chan_bits *b = &es1370_chan_bits[i]; 407 408 new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt; 409 old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt; 410 411 b->calc_freq (s, ctl, &old_freq, &new_freq); 412 413 if ((old_fmt != new_fmt) || (old_freq != new_freq)) { 414 d->shift = (new_fmt & 1) + (new_fmt >> 1); 415 ldebug ("channel %zu, freq = %d, nchannels %d, fmt %d, shift %d\n", 416 i, 417 new_freq, 418 1 << (new_fmt & 1), 419 (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8, 420 d->shift); 421 if (new_freq) { 422 struct audsettings as; 423 424 as.freq = new_freq; 425 as.nchannels = 1 << (new_fmt & 1); 426 as.fmt = (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8; 427 as.endianness = 0; 428 429 if (i == ADC_CHANNEL) { 430 s->adc_voice = 431 AUD_open_in ( 432 &s->card, 433 s->adc_voice, 434 "es1370.adc", 435 s, 436 es1370_adc_callback, 437 &as 438 ); 439 } 440 else { 441 s->dac_voice[i] = 442 AUD_open_out ( 443 &s->card, 444 s->dac_voice[i], 445 i ? "es1370.dac2" : "es1370.dac1", 446 s, 447 i ? es1370_dac2_callback : es1370_dac1_callback, 448 &as 449 ); 450 } 451 } 452 } 453 454 if (((ctl ^ s->ctl) & b->ctl_en) 455 || ((sctl ^ s->sctl) & b->sctl_pause)) { 456 int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause); 457 458 if (i == ADC_CHANNEL) { 459 AUD_set_active_in (s->adc_voice, on); 460 } 461 else { 462 AUD_set_active_out (s->dac_voice[i], on); 463 } 464 } 465 } 466 467 s->ctl = ctl; 468 s->sctl = sctl; 469} 470 471static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr) 472{ 473 addr &= 0xff; 474 if (addr >= 0x30 && addr <= 0x3f) 475 addr |= s->mempage << 8; 476 return addr; 477} 478 479static void es1370_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) 480{ 481 ES1370State *s = opaque; 482 struct chan *d = &s->chan[0]; 483 484 addr = es1370_fixup (s, addr); 485 486 switch (addr) { 487 case ES1370_REG_CONTROL: 488 es1370_update_voices (s, val, s->sctl); 489 print_ctl (val); 490 break; 491 492 case ES1370_REG_MEMPAGE: 493 s->mempage = val & 0xf; 494 break; 495 496 case ES1370_REG_SERIAL_CONTROL: 497 es1370_maybe_lower_irq (s, val); 498 es1370_update_voices (s, s->ctl, val); 499 print_sctl (val); 500 break; 501 502 case ES1370_REG_DAC1_SCOUNT: 503 case ES1370_REG_DAC2_SCOUNT: 504 case ES1370_REG_ADC_SCOUNT: 505 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2; 506 d->scount = (val & 0xffff) | (d->scount & ~0xffff); 507 ldebug ("chan %td CURR_SAMP_CT %d, SAMP_CT %d\n", 508 d - &s->chan[0], val >> 16, (val & 0xffff)); 509 break; 510 511 case ES1370_REG_ADC_FRAMEADR: 512 d += 2; 513 goto frameadr; 514 case ES1370_REG_DAC1_FRAMEADR: 515 case ES1370_REG_DAC2_FRAMEADR: 516 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3; 517 frameadr: 518 d->frame_addr = val; 519 ldebug ("chan %td frame address %#x\n", d - &s->chan[0], val); 520 break; 521 522 case ES1370_REG_PHANTOM_FRAMECNT: 523 lwarn ("writing to phantom frame count %#x\n", val); 524 break; 525 case ES1370_REG_PHANTOM_FRAMEADR: 526 lwarn ("writing to phantom frame address %#x\n", val); 527 break; 528 529 case ES1370_REG_ADC_FRAMECNT: 530 d += 2; 531 goto framecnt; 532 case ES1370_REG_DAC1_FRAMECNT: 533 case ES1370_REG_DAC2_FRAMECNT: 534 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3; 535 framecnt: 536 d->frame_cnt = val; 537 d->leftover = 0; 538 ldebug ("chan %td frame count %d, buffer size %d\n", 539 d - &s->chan[0], val >> 16, val & 0xffff); 540 break; 541 542 default: 543 lwarn ("writel %#x <- %#x\n", addr, val); 544 break; 545 } 546} 547 548static uint64_t es1370_read(void *opaque, hwaddr addr, unsigned size) 549{ 550 ES1370State *s = opaque; 551 uint32_t val; 552 struct chan *d = &s->chan[0]; 553 554 addr = es1370_fixup (s, addr); 555 556 switch (addr) { 557 case ES1370_REG_CONTROL: 558 val = s->ctl; 559 break; 560 case ES1370_REG_STATUS: 561 val = s->status; 562 break; 563 case ES1370_REG_MEMPAGE: 564 val = s->mempage; 565 break; 566 case ES1370_REG_CODEC: 567 val = s->codec; 568 break; 569 case ES1370_REG_SERIAL_CONTROL: 570 val = s->sctl; 571 break; 572 573 case ES1370_REG_DAC1_SCOUNT: 574 case ES1370_REG_DAC2_SCOUNT: 575 case ES1370_REG_ADC_SCOUNT: 576 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2; 577 val = d->scount; 578#ifdef DEBUG_ES1370 579 { 580 uint32_t curr_count = d->scount >> 16; 581 uint32_t count = d->scount & 0xffff; 582 583 curr_count <<= d->shift; 584 count <<= d->shift; 585 dolog ("read scount curr %d, total %d\n", curr_count, count); 586 } 587#endif 588 break; 589 590 case ES1370_REG_ADC_FRAMECNT: 591 d += 2; 592 goto framecnt; 593 case ES1370_REG_DAC1_FRAMECNT: 594 case ES1370_REG_DAC2_FRAMECNT: 595 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3; 596 framecnt: 597 val = d->frame_cnt; 598#ifdef DEBUG_ES1370 599 { 600 uint32_t size = ((d->frame_cnt & 0xffff) + 1) << 2; 601 uint32_t curr = ((d->frame_cnt >> 16) + 1) << 2; 602 if (curr > size) { 603 dolog ("read framecnt curr %d, size %d %d\n", curr, size, 604 curr > size); 605 } 606 } 607#endif 608 break; 609 610 case ES1370_REG_ADC_FRAMEADR: 611 d += 2; 612 goto frameadr; 613 case ES1370_REG_DAC1_FRAMEADR: 614 case ES1370_REG_DAC2_FRAMEADR: 615 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3; 616 frameadr: 617 val = d->frame_addr; 618 break; 619 620 case ES1370_REG_PHANTOM_FRAMECNT: 621 val = ~0U; 622 lwarn ("reading from phantom frame count\n"); 623 break; 624 case ES1370_REG_PHANTOM_FRAMEADR: 625 val = ~0U; 626 lwarn ("reading from phantom frame address\n"); 627 break; 628 629 default: 630 val = ~0U; 631 lwarn ("readl %#x -> %#x\n", addr, val); 632 break; 633 } 634 return val; 635} 636 637static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, 638 int max, int *irq) 639{ 640 uint8_t tmpbuf[4096]; 641 uint32_t addr = d->frame_addr; 642 int sc = d->scount & 0xffff; 643 int csc = d->scount >> 16; 644 int csc_bytes = (csc + 1) << d->shift; 645 int cnt = d->frame_cnt >> 16; 646 int size = d->frame_cnt & 0xffff; 647 if (size < cnt) { 648 return; 649 } 650 int left = ((size - cnt + 1) << 2) + d->leftover; 651 int transferred = 0; 652 int temp = MIN (max, MIN (left, csc_bytes)); 653 int index = d - &s->chan[0]; 654 655 addr += (cnt << 2) + d->leftover; 656 657 if (index == ADC_CHANNEL) { 658 while (temp > 0) { 659 int acquired, to_copy; 660 661 to_copy = MIN ((size_t) temp, sizeof (tmpbuf)); 662 acquired = AUD_read (s->adc_voice, tmpbuf, to_copy); 663 if (!acquired) 664 break; 665 666 pci_dma_write (&s->dev, addr, tmpbuf, acquired); 667 668 temp -= acquired; 669 addr += acquired; 670 transferred += acquired; 671 } 672 } 673 else { 674 SWVoiceOut *voice = s->dac_voice[index]; 675 676 while (temp > 0) { 677 int copied, to_copy; 678 679 to_copy = MIN ((size_t) temp, sizeof (tmpbuf)); 680 pci_dma_read (&s->dev, addr, tmpbuf, to_copy); 681 copied = AUD_write (voice, tmpbuf, to_copy); 682 if (!copied) 683 break; 684 temp -= copied; 685 addr += copied; 686 transferred += copied; 687 } 688 } 689 690 if (csc_bytes == transferred) { 691 *irq = 1; 692 d->scount = sc | (sc << 16); 693 ldebug ("sc = %d, rate = %f\n", 694 (sc + 1) << d->shift, 695 (sc + 1) / (double) 44100); 696 } 697 else { 698 *irq = 0; 699 d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16); 700 } 701 702 cnt += (transferred + d->leftover) >> 2; 703 704 if (s->sctl & loop_sel) { 705 /* Bah, how stupid is that having a 0 represent true value? 706 i just spent few hours on this shit */ 707 AUD_log ("es1370: warning", "non looping mode\n"); 708 } 709 else { 710 d->frame_cnt = size; 711 712 if ((uint32_t) cnt <= d->frame_cnt) 713 d->frame_cnt |= cnt << 16; 714 } 715 716 d->leftover = (transferred + d->leftover) & 3; 717} 718 719static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail) 720{ 721 uint32_t new_status = s->status; 722 int max_bytes, irq; 723 struct chan *d = &s->chan[chan]; 724 const struct chan_bits *b = &es1370_chan_bits[chan]; 725 726 if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) { 727 return; 728 } 729 730 max_bytes = free_or_avail; 731 max_bytes &= ~((1 << d->shift) - 1); 732 if (!max_bytes) { 733 return; 734 } 735 736 es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq); 737 738 if (irq) { 739 if (s->sctl & b->sctl_inten) { 740 new_status |= b->stat_int; 741 } 742 } 743 744 if (new_status != s->status) { 745 es1370_update_status (s, new_status); 746 } 747} 748 749static void es1370_dac1_callback (void *opaque, int free) 750{ 751 ES1370State *s = opaque; 752 753 es1370_run_channel (s, DAC1_CHANNEL, free); 754} 755 756static void es1370_dac2_callback (void *opaque, int free) 757{ 758 ES1370State *s = opaque; 759 760 es1370_run_channel (s, DAC2_CHANNEL, free); 761} 762 763static void es1370_adc_callback (void *opaque, int avail) 764{ 765 ES1370State *s = opaque; 766 767 es1370_run_channel (s, ADC_CHANNEL, avail); 768} 769 770static const MemoryRegionOps es1370_io_ops = { 771 .read = es1370_read, 772 .write = es1370_write, 773 .valid = { 774 .min_access_size = 1, 775 .max_access_size = 4, 776 }, 777 .impl = { 778 .min_access_size = 4, 779 .max_access_size = 4, 780 }, 781 .endianness = DEVICE_LITTLE_ENDIAN, 782}; 783 784static const VMStateDescription vmstate_es1370_channel = { 785 .name = "es1370_channel", 786 .version_id = 2, 787 .minimum_version_id = 2, 788 .fields = (VMStateField[]) { 789 VMSTATE_UINT32 (shift, struct chan), 790 VMSTATE_UINT32 (leftover, struct chan), 791 VMSTATE_UINT32 (scount, struct chan), 792 VMSTATE_UINT32 (frame_addr, struct chan), 793 VMSTATE_UINT32 (frame_cnt, struct chan), 794 VMSTATE_END_OF_LIST () 795 } 796}; 797 798static int es1370_post_load (void *opaque, int version_id) 799{ 800 uint32_t ctl, sctl; 801 ES1370State *s = opaque; 802 size_t i; 803 804 for (i = 0; i < NB_CHANNELS; ++i) { 805 if (i == ADC_CHANNEL) { 806 if (s->adc_voice) { 807 AUD_close_in (&s->card, s->adc_voice); 808 s->adc_voice = NULL; 809 } 810 } 811 else { 812 if (s->dac_voice[i]) { 813 AUD_close_out (&s->card, s->dac_voice[i]); 814 s->dac_voice[i] = NULL; 815 } 816 } 817 } 818 819 ctl = s->ctl; 820 sctl = s->sctl; 821 s->ctl = 0; 822 s->sctl = 0; 823 es1370_update_voices (s, ctl, sctl); 824 return 0; 825} 826 827static const VMStateDescription vmstate_es1370 = { 828 .name = "es1370", 829 .version_id = 2, 830 .minimum_version_id = 2, 831 .post_load = es1370_post_load, 832 .fields = (VMStateField[]) { 833 VMSTATE_PCI_DEVICE (dev, ES1370State), 834 VMSTATE_STRUCT_ARRAY (chan, ES1370State, NB_CHANNELS, 2, 835 vmstate_es1370_channel, struct chan), 836 VMSTATE_UINT32 (ctl, ES1370State), 837 VMSTATE_UINT32 (status, ES1370State), 838 VMSTATE_UINT32 (mempage, ES1370State), 839 VMSTATE_UINT32 (codec, ES1370State), 840 VMSTATE_UINT32 (sctl, ES1370State), 841 VMSTATE_END_OF_LIST () 842 } 843}; 844 845static void es1370_on_reset(DeviceState *dev) 846{ 847 ES1370State *s = container_of(dev, ES1370State, dev.qdev); 848 es1370_reset (s); 849} 850 851static void es1370_realize(PCIDevice *dev, Error **errp) 852{ 853 ES1370State *s = ES1370(dev); 854 uint8_t *c = s->dev.config; 855 856 c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8; 857 858#if 0 859 c[PCI_CAPABILITY_LIST] = 0xdc; 860 c[PCI_INTERRUPT_LINE] = 10; 861 c[0xdc] = 0x00; 862#endif 863 864 c[PCI_INTERRUPT_PIN] = 1; 865 c[PCI_MIN_GNT] = 0x0c; 866 c[PCI_MAX_LAT] = 0x80; 867 868 memory_region_init_io (&s->io, OBJECT(s), &es1370_io_ops, s, "es1370", 256); 869 pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); 870 871 AUD_register_card ("es1370", &s->card); 872 es1370_reset (s); 873} 874 875static void es1370_exit(PCIDevice *dev) 876{ 877 ES1370State *s = ES1370(dev); 878 int i; 879 880 for (i = 0; i < 2; ++i) { 881 AUD_close_out(&s->card, s->dac_voice[i]); 882 } 883 884 AUD_close_in(&s->card, s->adc_voice); 885 AUD_remove_card(&s->card); 886} 887 888static Property es1370_properties[] = { 889 DEFINE_AUDIO_PROPERTIES(ES1370State, card), 890 DEFINE_PROP_END_OF_LIST(), 891}; 892 893static void es1370_class_init (ObjectClass *klass, void *data) 894{ 895 DeviceClass *dc = DEVICE_CLASS (klass); 896 PCIDeviceClass *k = PCI_DEVICE_CLASS (klass); 897 898 k->realize = es1370_realize; 899 k->exit = es1370_exit; 900 k->vendor_id = PCI_VENDOR_ID_ENSONIQ; 901 k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370; 902 k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO; 903 k->subsystem_vendor_id = 0x4942; 904 k->subsystem_id = 0x4c4c; 905 set_bit(DEVICE_CATEGORY_SOUND, dc->categories); 906 dc->desc = "ENSONIQ AudioPCI ES1370"; 907 dc->vmsd = &vmstate_es1370; 908 dc->reset = es1370_on_reset; 909 device_class_set_props(dc, es1370_properties); 910} 911 912static const TypeInfo es1370_info = { 913 .name = TYPE_ES1370, 914 .parent = TYPE_PCI_DEVICE, 915 .instance_size = sizeof (ES1370State), 916 .class_init = es1370_class_init, 917 .interfaces = (InterfaceInfo[]) { 918 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 919 { }, 920 }, 921}; 922 923static void es1370_register_types (void) 924{ 925 type_register_static (&es1370_info); 926 deprecated_register_soundhw("es1370", "ENSONIQ AudioPCI ES1370", 927 0, TYPE_ES1370); 928} 929 930type_init (es1370_register_types)