cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

isa.c (4143B)

      1/*
      2 * QEMU IDE Emulation: ISA Bus support.
      3 *
      4 * Copyright (c) 2003 Fabrice Bellard
      5 * Copyright (c) 2006 Openedhand Ltd.
      6 *
      7 * Permission is hereby granted, free of charge, to any person obtaining a copy
      8 * of this software and associated documentation files (the "Software"), to deal
      9 * in the Software without restriction, including without limitation the rights
     10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     11 * copies of the Software, and to permit persons to whom the Software is
     12 * furnished to do so, subject to the following conditions:
     13 *
     14 * The above copyright notice and this permission notice shall be included in
     15 * all copies or substantial portions of the Software.
     16 *
     17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     23 * THE SOFTWARE.
     24 */
     25
     26#include "qemu/osdep.h"
     27#include "hw/isa/isa.h"
     28#include "hw/qdev-properties.h"
     29#include "migration/vmstate.h"
     30#include "qapi/error.h"
     31#include "qemu/module.h"
     32#include "sysemu/dma.h"
     33
     34#include "hw/ide/internal.h"
     35#include "qom/object.h"
     36
     37/***********************************************************/
     38/* ISA IDE definitions */
     39
     40#define TYPE_ISA_IDE "isa-ide"
     41OBJECT_DECLARE_SIMPLE_TYPE(ISAIDEState, ISA_IDE)
     42
     43struct ISAIDEState {
     44    ISADevice parent_obj;
     45
     46    IDEBus    bus;
     47    uint32_t  iobase;
     48    uint32_t  iobase2;
     49    uint32_t  isairq;
     50    qemu_irq  irq;
     51};
     52
     53static void isa_ide_reset(DeviceState *d)
     54{
     55    ISAIDEState *s = ISA_IDE(d);
     56
     57    ide_bus_reset(&s->bus);
     58}
     59
     60static const VMStateDescription vmstate_ide_isa = {
     61    .name = "isa-ide",
     62    .version_id = 3,
     63    .minimum_version_id = 0,
     64    .fields = (VMStateField[]) {
     65        VMSTATE_IDE_BUS(bus, ISAIDEState),
     66        VMSTATE_IDE_DRIVES(bus.ifs, ISAIDEState),
     67        VMSTATE_END_OF_LIST()
     68    }
     69};
     70
     71static void isa_ide_realizefn(DeviceState *dev, Error **errp)
     72{
     73    ISADevice *isadev = ISA_DEVICE(dev);
     74    ISAIDEState *s = ISA_IDE(dev);
     75
     76    ide_bus_init(&s->bus, sizeof(s->bus), dev, 0, 2);
     77    ide_init_ioport(&s->bus, isadev, s->iobase, s->iobase2);
     78    isa_init_irq(isadev, &s->irq, s->isairq);
     79    ide_init2(&s->bus, s->irq);
     80    vmstate_register(VMSTATE_IF(dev), 0, &vmstate_ide_isa, s);
     81    ide_register_restart_cb(&s->bus);
     82}
     83
     84ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq,
     85                        DriveInfo *hd0, DriveInfo *hd1)
     86{
     87    DeviceState *dev;
     88    ISADevice *isadev;
     89    ISAIDEState *s;
     90
     91    isadev = isa_new(TYPE_ISA_IDE);
     92    dev = DEVICE(isadev);
     93    qdev_prop_set_uint32(dev, "iobase",  iobase);
     94    qdev_prop_set_uint32(dev, "iobase2", iobase2);
     95    qdev_prop_set_uint32(dev, "irq",     isairq);
     96    isa_realize_and_unref(isadev, bus, &error_fatal);
     97
     98    s = ISA_IDE(dev);
     99    if (hd0) {
    100        ide_create_drive(&s->bus, 0, hd0);
    101    }
    102    if (hd1) {
    103        ide_create_drive(&s->bus, 1, hd1);
    104    }
    105    return isadev;
    106}
    107
    108static Property isa_ide_properties[] = {
    109    DEFINE_PROP_UINT32("iobase",  ISAIDEState, iobase,  0x1f0),
    110    DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6),
    111    DEFINE_PROP_UINT32("irq",    ISAIDEState, isairq,  14),
    112    DEFINE_PROP_END_OF_LIST(),
    113};
    114
    115static void isa_ide_class_initfn(ObjectClass *klass, void *data)
    116{
    117    DeviceClass *dc = DEVICE_CLASS(klass);
    118
    119    dc->realize = isa_ide_realizefn;
    120    dc->fw_name = "ide";
    121    dc->reset = isa_ide_reset;
    122    device_class_set_props(dc, isa_ide_properties);
    123    set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
    124}
    125
    126static const TypeInfo isa_ide_info = {
    127    .name          = TYPE_ISA_IDE,
    128    .parent        = TYPE_ISA_DEVICE,
    129    .instance_size = sizeof(ISAIDEState),
    130    .class_init    = isa_ide_class_initfn,
    131};
    132
    133static void isa_ide_register_types(void)
    134{
    135    type_register_static(&isa_ide_info);
    136}
    137
    138type_init(isa_ide_register_types)