q800.c (18892B)
1/* 2 * QEMU Motorla 680x0 Macintosh hardware System Emulator 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 * THE SOFTWARE. 21 */ 22 23#include "qemu/osdep.h" 24#include "qemu/units.h" 25#include "qemu-common.h" 26#include "qemu/datadir.h" 27#include "sysemu/sysemu.h" 28#include "cpu.h" 29#include "hw/boards.h" 30#include "hw/or-irq.h" 31#include "elf.h" 32#include "hw/loader.h" 33#include "ui/console.h" 34#include "hw/char/escc.h" 35#include "hw/sysbus.h" 36#include "hw/scsi/esp.h" 37#include "standard-headers/asm-m68k/bootinfo.h" 38#include "standard-headers/asm-m68k/bootinfo-mac.h" 39#include "bootinfo.h" 40#include "hw/misc/mac_via.h" 41#include "hw/input/adb.h" 42#include "hw/nubus/mac-nubus-bridge.h" 43#include "hw/display/macfb.h" 44#include "hw/block/swim.h" 45#include "net/net.h" 46#include "qapi/error.h" 47#include "sysemu/qtest.h" 48#include "sysemu/runstate.h" 49#include "sysemu/reset.h" 50#include "migration/vmstate.h" 51 52#define MACROM_ADDR 0x40800000 53#define MACROM_SIZE 0x00100000 54 55#define MACROM_FILENAME "MacROM.bin" 56 57#define IO_BASE 0x50000000 58#define IO_SLICE 0x00040000 59#define IO_SIZE 0x04000000 60 61#define VIA_BASE (IO_BASE + 0x00000) 62#define SONIC_PROM_BASE (IO_BASE + 0x08000) 63#define SONIC_BASE (IO_BASE + 0x0a000) 64#define SCC_BASE (IO_BASE + 0x0c020) 65#define ESP_BASE (IO_BASE + 0x10000) 66#define ESP_PDMA (IO_BASE + 0x10100) 67#define ASC_BASE (IO_BASE + 0x14000) 68#define SWIM_BASE (IO_BASE + 0x1E000) 69 70#define SONIC_PROM_SIZE 0x1000 71 72/* 73 * the video base, whereas it a Nubus address, 74 * is needed by the kernel to have early display and 75 * thus provided by the bootloader 76 */ 77#define VIDEO_BASE 0xf9000000 78 79#define MAC_CLOCK 3686418 80 81/* 82 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only 83 * slots 0xc, 0xd and 0xe physically exist on the Quadra 800 84 */ 85#define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \ 86 BIT(0xe)) 87 88/* 89 * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip 90 * that performs a variety of functions (RAM management, clock generation, ...). 91 * The GLUE chip receives interrupt requests from various devices, 92 * assign priority to each, and asserts one or more interrupt line to the 93 * CPU. 94 */ 95 96#define TYPE_GLUE "q800-glue" 97OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) 98 99struct GLUEState { 100 SysBusDevice parent_obj; 101 M68kCPU *cpu; 102 uint8_t ipr; 103}; 104 105static void GLUE_set_irq(void *opaque, int irq, int level) 106{ 107 GLUEState *s = opaque; 108 int i; 109 110 if (level) { 111 s->ipr |= 1 << irq; 112 } else { 113 s->ipr &= ~(1 << irq); 114 } 115 116 for (i = 7; i >= 0; i--) { 117 if ((s->ipr >> i) & 1) { 118 m68k_set_irq_level(s->cpu, i + 1, i + 25); 119 return; 120 } 121 } 122 m68k_set_irq_level(s->cpu, 0, 0); 123} 124 125static void glue_reset(DeviceState *dev) 126{ 127 GLUEState *s = GLUE(dev); 128 129 s->ipr = 0; 130} 131 132static const VMStateDescription vmstate_glue = { 133 .name = "q800-glue", 134 .version_id = 0, 135 .minimum_version_id = 0, 136 .fields = (VMStateField[]) { 137 VMSTATE_UINT8(ipr, GLUEState), 138 VMSTATE_END_OF_LIST(), 139 }, 140}; 141 142/* 143 * If the m68k CPU implemented its inbound irq lines as GPIO lines 144 * rather than via the m68k_set_irq_level() function we would not need 145 * this cpu link property and could instead provide outbound IRQ lines 146 * that the board could wire up to the CPU. 147 */ 148static Property glue_properties[] = { 149 DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), 150 DEFINE_PROP_END_OF_LIST(), 151}; 152 153static void glue_init(Object *obj) 154{ 155 DeviceState *dev = DEVICE(obj); 156 157 qdev_init_gpio_in(dev, GLUE_set_irq, 8); 158} 159 160static void glue_class_init(ObjectClass *klass, void *data) 161{ 162 DeviceClass *dc = DEVICE_CLASS(klass); 163 164 dc->vmsd = &vmstate_glue; 165 dc->reset = glue_reset; 166 device_class_set_props(dc, glue_properties); 167} 168 169static const TypeInfo glue_info = { 170 .name = TYPE_GLUE, 171 .parent = TYPE_SYS_BUS_DEVICE, 172 .instance_size = sizeof(GLUEState), 173 .instance_init = glue_init, 174 .class_init = glue_class_init, 175}; 176 177static void main_cpu_reset(void *opaque) 178{ 179 M68kCPU *cpu = opaque; 180 CPUState *cs = CPU(cpu); 181 182 cpu_reset(cs); 183 cpu->env.aregs[7] = ldl_phys(cs->as, 0); 184 cpu->env.pc = ldl_phys(cs->as, 4); 185} 186 187static uint8_t fake_mac_rom[] = { 188 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 189 190 /* offset: 0xa - mac_reset */ 191 192 /* via2[vDirB] |= VIA2B_vPower */ 193 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ 194 0x10, 0x10, /* moveb %a0@,%d0 */ 195 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ 196 0x10, 0x80, /* moveb %d0,%a0@ */ 197 198 /* via2[vBufB] &= ~VIA2B_vPower */ 199 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ 200 0x10, 0x10, /* moveb %a0@,%d0 */ 201 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ 202 0x10, 0x80, /* moveb %d0,%a0@ */ 203 204 /* while (true) ; */ 205 0x60, 0xFE /* bras [self] */ 206}; 207 208static void q800_init(MachineState *machine) 209{ 210 M68kCPU *cpu = NULL; 211 int linux_boot; 212 int32_t kernel_size; 213 uint64_t elf_entry; 214 char *filename; 215 int bios_size; 216 ram_addr_t initrd_base; 217 int32_t initrd_size; 218 MemoryRegion *rom; 219 MemoryRegion *io; 220 MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1); 221 uint8_t *prom; 222 const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; 223 int i, checksum; 224 MacFbMode *macfb_mode; 225 ram_addr_t ram_size = machine->ram_size; 226 const char *kernel_filename = machine->kernel_filename; 227 const char *initrd_filename = machine->initrd_filename; 228 const char *kernel_cmdline = machine->kernel_cmdline; 229 const char *bios_name = machine->firmware ?: MACROM_FILENAME; 230 hwaddr parameters_base; 231 CPUState *cs; 232 DeviceState *dev; 233 DeviceState *via1_dev, *via2_dev; 234 DeviceState *escc_orgate; 235 SysBusESPState *sysbus_esp; 236 ESPState *esp; 237 SysBusDevice *sysbus; 238 BusState *adb_bus; 239 NubusBus *nubus; 240 DeviceState *glue; 241 DriveInfo *dinfo; 242 243 linux_boot = (kernel_filename != NULL); 244 245 if (ram_size > 1 * GiB) { 246 error_report("Too much memory for this machine: %" PRId64 " MiB, " 247 "maximum 1024 MiB", ram_size / MiB); 248 exit(1); 249 } 250 251 /* init CPUs */ 252 cpu = M68K_CPU(cpu_create(machine->cpu_type)); 253 qemu_register_reset(main_cpu_reset, cpu); 254 255 /* RAM */ 256 memory_region_add_subregion(get_system_memory(), 0, machine->ram); 257 258 /* 259 * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated 260 * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE 261 */ 262 io = g_new(MemoryRegion, io_slice_nb); 263 for (i = 0; i < io_slice_nb; i++) { 264 char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1); 265 266 memory_region_init_alias(&io[i], NULL, name, get_system_memory(), 267 IO_BASE, IO_SLICE); 268 memory_region_add_subregion(get_system_memory(), 269 IO_BASE + (i + 1) * IO_SLICE, &io[i]); 270 g_free(name); 271 } 272 273 /* IRQ Glue */ 274 glue = qdev_new(TYPE_GLUE); 275 object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); 276 sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); 277 278 /* VIA 1 */ 279 via1_dev = qdev_new(TYPE_MOS6522_Q800_VIA1); 280 dinfo = drive_get(IF_MTD, 0, 0); 281 if (dinfo) { 282 qdev_prop_set_drive(via1_dev, "drive", blk_by_legacy_dinfo(dinfo)); 283 } 284 sysbus = SYS_BUS_DEVICE(via1_dev); 285 sysbus_realize_and_unref(sysbus, &error_fatal); 286 sysbus_mmio_map(sysbus, 1, VIA_BASE); 287 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 0)); 288 289 adb_bus = qdev_get_child_bus(via1_dev, "adb.0"); 290 dev = qdev_new(TYPE_ADB_KEYBOARD); 291 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 292 dev = qdev_new(TYPE_ADB_MOUSE); 293 qdev_realize_and_unref(dev, adb_bus, &error_fatal); 294 295 /* VIA 2 */ 296 via2_dev = qdev_new(TYPE_MOS6522_Q800_VIA2); 297 sysbus = SYS_BUS_DEVICE(via2_dev); 298 sysbus_realize_and_unref(sysbus, &error_fatal); 299 sysbus_mmio_map(sysbus, 1, VIA_BASE + VIA_SIZE); 300 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 1)); 301 302 /* MACSONIC */ 303 304 if (nb_nics > 1) { 305 error_report("q800 can only have one ethernet interface"); 306 exit(1); 307 } 308 309 qemu_check_nic_model(&nd_table[0], "dp83932"); 310 311 /* 312 * MacSonic driver needs an Apple MAC address 313 * Valid prefix are: 314 * 00:05:02 Apple 315 * 00:80:19 Dayna Communications, Inc. 316 * 00:A0:40 Apple 317 * 08:00:07 Apple 318 * (Q800 use the last one) 319 */ 320 nd_table[0].macaddr.a[0] = 0x08; 321 nd_table[0].macaddr.a[1] = 0x00; 322 nd_table[0].macaddr.a[2] = 0x07; 323 324 dev = qdev_new("dp8393x"); 325 qdev_set_nic_properties(dev, &nd_table[0]); 326 qdev_prop_set_uint8(dev, "it_shift", 2); 327 qdev_prop_set_bit(dev, "big_endian", true); 328 object_property_set_link(OBJECT(dev), "dma_mr", 329 OBJECT(get_system_memory()), &error_abort); 330 sysbus = SYS_BUS_DEVICE(dev); 331 sysbus_realize_and_unref(sysbus, &error_fatal); 332 sysbus_mmio_map(sysbus, 0, SONIC_BASE); 333 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); 334 335 memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom", 336 SONIC_PROM_SIZE, &error_fatal); 337 memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE, 338 dp8393x_prom); 339 340 /* Add MAC address with valid checksum to PROM */ 341 prom = memory_region_get_ram_ptr(dp8393x_prom); 342 checksum = 0; 343 for (i = 0; i < 6; i++) { 344 prom[i] = revbit8(nd_table[0].macaddr.a[i]); 345 checksum ^= prom[i]; 346 } 347 prom[7] = 0xff - checksum; 348 349 /* SCC */ 350 351 dev = qdev_new(TYPE_ESCC); 352 qdev_prop_set_uint32(dev, "disabled", 0); 353 qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); 354 qdev_prop_set_uint32(dev, "it_shift", 1); 355 qdev_prop_set_bit(dev, "bit_swap", true); 356 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); 357 qdev_prop_set_chr(dev, "chrB", serial_hd(1)); 358 qdev_prop_set_uint32(dev, "chnBtype", 0); 359 qdev_prop_set_uint32(dev, "chnAtype", 0); 360 sysbus = SYS_BUS_DEVICE(dev); 361 sysbus_realize_and_unref(sysbus, &error_fatal); 362 363 /* Logically OR both its IRQs together */ 364 escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); 365 object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); 366 qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); 367 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); 368 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); 369 qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3)); 370 sysbus_mmio_map(sysbus, 0, SCC_BASE); 371 372 /* SCSI */ 373 374 dev = qdev_new(TYPE_SYSBUS_ESP); 375 sysbus_esp = SYSBUS_ESP(dev); 376 esp = &sysbus_esp->esp; 377 esp->dma_memory_read = NULL; 378 esp->dma_memory_write = NULL; 379 esp->dma_opaque = NULL; 380 sysbus_esp->it_shift = 4; 381 esp->dma_enabled = 1; 382 383 sysbus = SYS_BUS_DEVICE(dev); 384 sysbus_realize_and_unref(sysbus, &error_fatal); 385 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(via2_dev, 386 VIA2_IRQ_SCSI_BIT)); 387 sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(via2_dev, 388 VIA2_IRQ_SCSI_DATA_BIT)); 389 sysbus_mmio_map(sysbus, 0, ESP_BASE); 390 sysbus_mmio_map(sysbus, 1, ESP_PDMA); 391 392 scsi_bus_legacy_handle_cmdline(&esp->bus); 393 394 /* SWIM floppy controller */ 395 396 dev = qdev_new(TYPE_SWIM); 397 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 398 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); 399 400 /* NuBus */ 401 402 dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); 403 qdev_prop_set_uint32(dev, "slot-available-mask", 404 Q800_NUBUS_SLOTS_AVAILABLE); 405 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 406 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 407 MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE); 408 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE + 409 MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE); 410 qdev_connect_gpio_out(dev, 9, 411 qdev_get_gpio_in_named(via2_dev, "nubus-irq", 412 VIA2_NUBUS_IRQ_INTVIDEO)); 413 for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) { 414 qdev_connect_gpio_out(dev, 9 + i, 415 qdev_get_gpio_in_named(via2_dev, "nubus-irq", 416 VIA2_NUBUS_IRQ_9 + i)); 417 } 418 419 nubus = &NUBUS_BRIDGE(dev)->bus; 420 421 /* framebuffer in nubus slot #9 */ 422 423 dev = qdev_new(TYPE_NUBUS_MACFB); 424 qdev_prop_set_uint32(dev, "slot", 9); 425 qdev_prop_set_uint32(dev, "width", graphic_width); 426 qdev_prop_set_uint32(dev, "height", graphic_height); 427 qdev_prop_set_uint8(dev, "depth", graphic_depth); 428 if (graphic_width == 1152 && graphic_height == 870 && graphic_depth == 8) { 429 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR); 430 } else { 431 qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA); 432 } 433 qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); 434 435 macfb_mode = (NUBUS_MACFB(dev)->macfb).mode; 436 437 cs = CPU(cpu); 438 if (linux_boot) { 439 uint64_t high; 440 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 441 &elf_entry, NULL, &high, NULL, 1, 442 EM_68K, 0, 0); 443 if (kernel_size < 0) { 444 error_report("could not load kernel '%s'", kernel_filename); 445 exit(1); 446 } 447 stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ 448 parameters_base = (high + 1) & ~1; 449 450 BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC); 451 BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); 452 BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); 453 BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); 454 BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, CPUB_68040); 455 BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, MAC_MODEL_Q800); 456 BOOTINFO1(cs->as, parameters_base, 457 BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ 458 BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); 459 BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, 460 VIDEO_BASE + macfb_mode->offset); 461 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth); 462 BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM, 463 (graphic_height << 16) | graphic_width); 464 BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, macfb_mode->stride); 465 BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); 466 467 rom = g_malloc(sizeof(*rom)); 468 memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", 469 sizeof(fake_mac_rom), fake_mac_rom); 470 memory_region_set_readonly(rom, true); 471 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 472 473 if (kernel_cmdline) { 474 BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, 475 kernel_cmdline); 476 } 477 478 /* load initrd */ 479 if (initrd_filename) { 480 initrd_size = get_image_size(initrd_filename); 481 if (initrd_size < 0) { 482 error_report("could not load initial ram disk '%s'", 483 initrd_filename); 484 exit(1); 485 } 486 487 initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; 488 load_image_targphys(initrd_filename, initrd_base, 489 ram_size - initrd_base); 490 BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, 491 initrd_size); 492 } else { 493 initrd_base = 0; 494 initrd_size = 0; 495 } 496 BOOTINFO0(cs->as, parameters_base, BI_LAST); 497 } else { 498 uint8_t *ptr; 499 /* allocate and load BIOS */ 500 rom = g_malloc(sizeof(*rom)); 501 memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, 502 &error_abort); 503 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 504 memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); 505 506 /* Load MacROM binary */ 507 if (filename) { 508 bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); 509 g_free(filename); 510 } else { 511 bios_size = -1; 512 } 513 514 /* Remove qtest_enabled() check once firmware files are in the tree */ 515 if (!qtest_enabled()) { 516 if (bios_size < 0 || bios_size > MACROM_SIZE) { 517 error_report("could not load MacROM '%s'", bios_name); 518 exit(1); 519 } 520 521 ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE); 522 stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ 523 stl_phys(cs->as, 4, 524 MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ 525 } 526 } 527} 528 529static void q800_machine_class_init(ObjectClass *oc, void *data) 530{ 531 MachineClass *mc = MACHINE_CLASS(oc); 532 mc->desc = "Macintosh Quadra 800"; 533 mc->init = q800_init; 534 mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); 535 mc->max_cpus = 1; 536 mc->block_default_type = IF_SCSI; 537 mc->default_ram_id = "m68k_mac.ram"; 538} 539 540static const TypeInfo q800_machine_typeinfo = { 541 .name = MACHINE_TYPE_NAME("q800"), 542 .parent = TYPE_MACHINE, 543 .class_init = q800_machine_class_init, 544}; 545 546static void q800_machine_register_types(void) 547{ 548 type_register_static(&q800_machine_typeinfo); 549 type_register_static(&glue_info); 550} 551 552type_init(q800_machine_register_types)