cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

petalogix_s3adsp1800_mmu.c (5320B)


      1/*
      2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
      3 * boards.
      4 *
      5 * Copyright (c) 2009 Edgar E. Iglesias.
      6 *
      7 * Permission is hereby granted, free of charge, to any person obtaining a copy
      8 * of this software and associated documentation files (the "Software"), to deal
      9 * in the Software without restriction, including without limitation the rights
     10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     11 * copies of the Software, and to permit persons to whom the Software is
     12 * furnished to do so, subject to the following conditions:
     13 *
     14 * The above copyright notice and this permission notice shall be included in
     15 * all copies or substantial portions of the Software.
     16 *
     17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     23 * THE SOFTWARE.
     24 */
     25
     26#include "qemu/osdep.h"
     27#include "qemu/units.h"
     28#include "qapi/error.h"
     29#include "cpu.h"
     30#include "hw/sysbus.h"
     31#include "net/net.h"
     32#include "hw/block/flash.h"
     33#include "sysemu/sysemu.h"
     34#include "hw/boards.h"
     35#include "hw/misc/unimp.h"
     36#include "exec/address-spaces.h"
     37#include "hw/char/xilinx_uartlite.h"
     38
     39#include "boot.h"
     40
     41#define LMB_BRAM_SIZE  (128 * KiB)
     42#define FLASH_SIZE     (16 * MiB)
     43
     44#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
     45
     46#define MEMORY_BASEADDR 0x90000000
     47#define FLASH_BASEADDR 0xa0000000
     48#define GPIO_BASEADDR 0x81400000
     49#define INTC_BASEADDR 0x81800000
     50#define TIMER_BASEADDR 0x83c00000
     51#define UARTLITE_BASEADDR 0x84000000
     52#define ETHLITE_BASEADDR 0x81000000
     53
     54#define TIMER_IRQ           0
     55#define ETHLITE_IRQ         1
     56#define UARTLITE_IRQ        3
     57
     58static void
     59petalogix_s3adsp1800_init(MachineState *machine)
     60{
     61    ram_addr_t ram_size = machine->ram_size;
     62    DeviceState *dev;
     63    MicroBlazeCPU *cpu;
     64    DriveInfo *dinfo;
     65    int i;
     66    hwaddr ddr_base = MEMORY_BASEADDR;
     67    MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
     68    MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
     69    qemu_irq irq[32];
     70    MemoryRegion *sysmem = get_system_memory();
     71
     72    cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
     73    object_property_set_str(OBJECT(cpu), "version", "7.10.d", &error_abort);
     74    qdev_realize(DEVICE(cpu), NULL, &error_abort);
     75
     76    /* Attach emulated BRAM through the LMB.  */
     77    memory_region_init_ram(phys_lmb_bram, NULL,
     78                           "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
     79                           &error_fatal);
     80    memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
     81
     82    memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
     83                           ram_size, &error_fatal);
     84    memory_region_add_subregion(sysmem, ddr_base, phys_ram);
     85
     86    dinfo = drive_get(IF_PFLASH, 0, 0);
     87    pflash_cfi01_register(FLASH_BASEADDR,
     88                          "petalogix_s3adsp1800.flash", FLASH_SIZE,
     89                          dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
     90                          64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
     91
     92    dev = qdev_new("xlnx.xps-intc");
     93    qdev_prop_set_uint32(dev, "kind-of-intr",
     94                         1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
     95    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
     96    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
     97    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
     98                       qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
     99    for (i = 0; i < 32; i++) {
    100        irq[i] = qdev_get_gpio_in(dev, i);
    101    }
    102
    103    xilinx_uartlite_create(UARTLITE_BASEADDR, irq[UARTLITE_IRQ],
    104                           serial_hd(0));
    105
    106    /* 2 timers at irq 2 @ 62 Mhz.  */
    107    dev = qdev_new("xlnx.xps-timer");
    108    qdev_prop_set_uint32(dev, "one-timer-only", 0);
    109    qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
    110    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
    111    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
    112    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
    113
    114    qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
    115    dev = qdev_new("xlnx.xps-ethernetlite");
    116    qdev_set_nic_properties(dev, &nd_table[0]);
    117    qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
    118    qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
    119    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
    120    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
    121    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
    122
    123    create_unimplemented_device("gpio", GPIO_BASEADDR, 0x10000);
    124
    125    microblaze_load_kernel(cpu, ddr_base, ram_size,
    126                           machine->initrd_filename,
    127                           BINARY_DEVICE_TREE_FILE,
    128                           NULL);
    129}
    130
    131static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
    132{
    133    mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
    134    mc->init = petalogix_s3adsp1800_init;
    135    mc->is_default = true;
    136}
    137
    138DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)