cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

loongson3_bootp.h (7589B)


      1/*
      2 * LEFI (a UEFI-like interface for BIOS-Kernel boot parameters) data structures
      3 * defined at arch/mips/include/asm/mach-loongson64/boot_param.h in Linux kernel
      4 *
      5 * Copyright (c) 2017-2020 Huacai Chen (chenhc@lemote.com)
      6 * Copyright (c) 2017-2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
      7 *
      8 * This program is free software: you can redistribute it and/or modify
      9 * it under the terms of the GNU General Public License as published by
     10 * the Free Software Foundation, either version 2 of the License, or
     11 * (at your option) any later version.
     12 *
     13 * This program is distributed in the hope that it will be useful,
     14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
     16 * GNU General Public License for more details.
     17 *
     18 * You should have received a copy of the GNU General Public License
     19 * along with this program. If not, see <https://www.gnu.org/licenses/>.
     20 */
     21
     22#ifndef HW_MIPS_LOONGSON3_BOOTP_H
     23#define HW_MIPS_LOONGSON3_BOOTP_H
     24
     25struct efi_memory_map_loongson {
     26    uint16_t vers;               /* version of efi_memory_map */
     27    uint32_t nr_map;             /* number of memory_maps */
     28    uint32_t mem_freq;           /* memory frequence */
     29    struct mem_map {
     30        uint32_t node_id;        /* node_id which memory attached to */
     31        uint32_t mem_type;       /* system memory, pci memory, pci io, etc. */
     32        uint64_t mem_start;      /* memory map start address */
     33        uint32_t mem_size;       /* each memory_map size, not the total size */
     34    } map[128];
     35} QEMU_PACKED;
     36
     37enum loongson_cpu_type {
     38    Legacy_2E = 0x0,
     39    Legacy_2F = 0x1,
     40    Legacy_3A = 0x2,
     41    Legacy_3B = 0x3,
     42    Legacy_1A = 0x4,
     43    Legacy_1B = 0x5,
     44    Legacy_2G = 0x6,
     45    Legacy_2H = 0x7,
     46    Loongson_1A = 0x100,
     47    Loongson_1B = 0x101,
     48    Loongson_2E = 0x200,
     49    Loongson_2F = 0x201,
     50    Loongson_2G = 0x202,
     51    Loongson_2H = 0x203,
     52    Loongson_3A = 0x300,
     53    Loongson_3B = 0x301
     54};
     55
     56/*
     57 * Capability and feature descriptor structure for MIPS CPU
     58 */
     59struct efi_cpuinfo_loongson {
     60    uint16_t vers;               /* version of efi_cpuinfo_loongson */
     61    uint32_t processor_id;       /* PRID, e.g. 6305, 6306 */
     62    uint32_t cputype;            /* Loongson_3A/3B, etc. */
     63    uint32_t total_node;         /* num of total numa nodes */
     64    uint16_t cpu_startup_core_id;   /* Boot core id */
     65    uint16_t reserved_cores_mask;
     66    uint32_t cpu_clock_freq;     /* cpu_clock */
     67    uint32_t nr_cpus;
     68    char cpuname[64];
     69} QEMU_PACKED;
     70
     71#define MAX_UARTS 64
     72struct uart_device {
     73    uint32_t iotype;
     74    uint32_t uartclk;
     75    uint32_t int_offset;
     76    uint64_t uart_base;
     77} QEMU_PACKED;
     78
     79#define MAX_SENSORS 64
     80#define SENSOR_TEMPER  0x00000001
     81#define SENSOR_VOLTAGE 0x00000002
     82#define SENSOR_FAN     0x00000004
     83struct sensor_device {
     84    char name[32];  /* a formal name */
     85    char label[64]; /* a flexible description */
     86    uint32_t type;       /* SENSOR_* */
     87    uint32_t id;         /* instance id of a sensor-class */
     88    uint32_t fan_policy; /* step speed or constant speed */
     89    uint32_t fan_percent;/* only for constant speed policy */
     90    uint64_t base_addr;  /* base address of device registers */
     91} QEMU_PACKED;
     92
     93struct system_loongson {
     94    uint16_t vers;               /* version of system_loongson */
     95    uint32_t ccnuma_smp;         /* 0: no numa; 1: has numa */
     96    uint32_t sing_double_channel;/* 1: single; 2: double */
     97    uint32_t nr_uarts;
     98    struct uart_device uarts[MAX_UARTS];
     99    uint32_t nr_sensors;
    100    struct sensor_device sensors[MAX_SENSORS];
    101    char has_ec;
    102    char ec_name[32];
    103    uint64_t ec_base_addr;
    104    char has_tcm;
    105    char tcm_name[32];
    106    uint64_t tcm_base_addr;
    107    uint64_t workarounds;
    108    uint64_t of_dtb_addr; /* NULL if not support */
    109} QEMU_PACKED;
    110
    111struct irq_source_routing_table {
    112    uint16_t vers;
    113    uint16_t size;
    114    uint16_t rtr_bus;
    115    uint16_t rtr_devfn;
    116    uint32_t vendor;
    117    uint32_t device;
    118    uint32_t PIC_type;           /* conform use HT or PCI to route to CPU-PIC */
    119    uint64_t ht_int_bit;         /* 3A: 1<<24; 3B: 1<<16 */
    120    uint64_t ht_enable;          /* irqs used in this PIC */
    121    uint32_t node_id;            /* node id: 0x0-0; 0x1-1; 0x10-2; 0x11-3 */
    122    uint64_t pci_mem_start_addr;
    123    uint64_t pci_mem_end_addr;
    124    uint64_t pci_io_start_addr;
    125    uint64_t pci_io_end_addr;
    126    uint64_t pci_config_addr;
    127    uint16_t dma_mask_bits;
    128    uint16_t dma_noncoherent;
    129} QEMU_PACKED;
    130
    131struct interface_info {
    132    uint16_t vers;               /* version of the specificition */
    133    uint16_t size;
    134    uint8_t  flag;
    135    char description[64];
    136} QEMU_PACKED;
    137
    138#define MAX_RESOURCE_NUMBER 128
    139struct resource_loongson {
    140    uint64_t start;              /* resource start address */
    141    uint64_t end;                /* resource end address */
    142    char name[64];
    143    uint32_t flags;
    144};
    145
    146struct archdev_data {};          /* arch specific additions */
    147
    148struct board_devices {
    149    char name[64];               /* hold the device name */
    150    uint32_t num_resources;      /* number of device_resource */
    151    /* for each device's resource */
    152    struct resource_loongson resource[MAX_RESOURCE_NUMBER];
    153    /* arch specific additions */
    154    struct archdev_data archdata;
    155};
    156
    157struct loongson_special_attribute {
    158    uint16_t vers;               /* version of this special */
    159    char special_name[64];       /* special_atribute_name */
    160    uint32_t loongson_special_type; /* type of special device */
    161    /* for each device's resource */
    162    struct resource_loongson resource[MAX_RESOURCE_NUMBER];
    163};
    164
    165struct loongson_params {
    166    uint64_t memory_offset;      /* efi_memory_map_loongson struct offset */
    167    uint64_t cpu_offset;         /* efi_cpuinfo_loongson struct offset */
    168    uint64_t system_offset;      /* system_loongson struct offset */
    169    uint64_t irq_offset;         /* irq_source_routing_table struct offset */
    170    uint64_t interface_offset;   /* interface_info struct offset */
    171    uint64_t special_offset;     /* loongson_special_attribute struct offset */
    172    uint64_t boarddev_table_offset;  /* board_devices offset */
    173};
    174
    175struct smbios_tables {
    176    uint16_t vers;               /* version of smbios */
    177    uint64_t vga_bios;           /* vga_bios address */
    178    struct loongson_params lp;
    179};
    180
    181struct efi_reset_system_t {
    182    uint64_t ResetCold;
    183    uint64_t ResetWarm;
    184    uint64_t ResetType;
    185    uint64_t Shutdown;
    186    uint64_t DoSuspend; /* NULL if not support */
    187};
    188
    189struct efi_loongson {
    190    uint64_t mps;                /* MPS table */
    191    uint64_t acpi;               /* ACPI table (IA64 ext 0.71) */
    192    uint64_t acpi20;             /* ACPI table (ACPI 2.0) */
    193    struct smbios_tables smbios; /* SM BIOS table */
    194    uint64_t sal_systab;         /* SAL system table */
    195    uint64_t boot_info;          /* boot info table */
    196};
    197
    198struct boot_params {
    199    struct efi_loongson efi;
    200    struct efi_reset_system_t reset_system;
    201};
    202
    203/* Overall MMIO & Memory layout */
    204enum {
    205    VIRT_LOWMEM,
    206    VIRT_PM,
    207    VIRT_FW_CFG,
    208    VIRT_RTC,
    209    VIRT_PCIE_PIO,
    210    VIRT_PCIE_ECAM,
    211    VIRT_BIOS_ROM,
    212    VIRT_UART,
    213    VIRT_LIOINTC,
    214    VIRT_PCIE_MMIO,
    215    VIRT_HIGHMEM
    216};
    217
    218/* Low MEM layout for QEMU kernel loader */
    219enum {
    220    LOADER_KERNEL,
    221    LOADER_INITRD,
    222    LOADER_CMDLINE
    223};
    224
    225/* BIOS ROM layout for QEMU kernel loader */
    226enum {
    227    LOADER_BOOTROM,
    228    LOADER_PARAM,
    229};
    230
    231extern const MemMapEntry virt_memmap[];
    232void init_loongson_params(struct loongson_params *lp, void *p,
    233                          uint64_t cpu_freq, uint64_t ram_size);
    234void init_reset_system(struct efi_reset_system_t *reset);
    235
    236#endif