cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

meson.build (712B)

      1mips_ss = ss.source_set()
      2mips_ss.add(files('bootloader.c', 'mips_int.c'))
      3mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c'))
      4mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loongson3_virt.c'))
      5mips_ss.add(when: 'CONFIG_MALTA', if_true: files('gt64xxx_pci.c', 'malta.c'))
      6mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c'))
      7
      8if 'CONFIG_TCG' in config_all
      9mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c'))
     10mips_ss.add(when: 'CONFIG_MIPSSIM', if_true: files('mipssim.c'))
     11mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c'))
     12mips_ss.add(when: 'CONFIG_MIPS_BOSTON', if_true: [files('boston.c'), fdt])
     13endif
     14
     15hw_arch += {'mips': mips_ss}