cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

imx7_snvs.c (2282B)

      1/*
      2 * IMX7 Secure Non-Volatile Storage
      3 *
      4 * Copyright (c) 2018, Impinj, Inc.
      5 *
      6 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
      7 *
      8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
      9 * See the COPYING file in the top-level directory.
     10 *
     11 * Bare minimum emulation code needed to support being able to shut
     12 * down linux guest gracefully.
     13 */
     14
     15#include "qemu/osdep.h"
     16#include "hw/misc/imx7_snvs.h"
     17#include "qemu/module.h"
     18#include "sysemu/runstate.h"
     19
     20static uint64_t imx7_snvs_read(void *opaque, hwaddr offset, unsigned size)
     21{
     22    return 0;
     23}
     24
     25static void imx7_snvs_write(void *opaque, hwaddr offset,
     26                            uint64_t v, unsigned size)
     27{
     28    const uint32_t value = v;
     29    const uint32_t mask  = SNVS_LPCR_TOP | SNVS_LPCR_DP_EN;
     30
     31    if (offset == SNVS_LPCR && ((value & mask) == mask)) {
     32        qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
     33    }
     34}
     35
     36static const struct MemoryRegionOps imx7_snvs_ops = {
     37    .read = imx7_snvs_read,
     38    .write = imx7_snvs_write,
     39    .endianness = DEVICE_NATIVE_ENDIAN,
     40    .impl = {
     41        /*
     42         * Our device would not work correctly if the guest was doing
     43         * unaligned access. This might not be a limitation on the real
     44         * device but in practice there is no reason for a guest to access
     45         * this device unaligned.
     46         */
     47        .min_access_size = 4,
     48        .max_access_size = 4,
     49        .unaligned = false,
     50    },
     51};
     52
     53static void imx7_snvs_init(Object *obj)
     54{
     55    SysBusDevice *sd = SYS_BUS_DEVICE(obj);
     56    IMX7SNVSState *s = IMX7_SNVS(obj);
     57
     58    memory_region_init_io(&s->mmio, obj, &imx7_snvs_ops, s,
     59                          TYPE_IMX7_SNVS, 0x1000);
     60
     61    sysbus_init_mmio(sd, &s->mmio);
     62}
     63
     64static void imx7_snvs_class_init(ObjectClass *klass, void *data)
     65{
     66    DeviceClass *dc = DEVICE_CLASS(klass);
     67
     68    dc->desc  = "i.MX7 Secure Non-Volatile Storage Module";
     69}
     70
     71static const TypeInfo imx7_snvs_info = {
     72    .name          = TYPE_IMX7_SNVS,
     73    .parent        = TYPE_SYS_BUS_DEVICE,
     74    .instance_size = sizeof(IMX7SNVSState),
     75    .instance_init = imx7_snvs_init,
     76    .class_init    = imx7_snvs_class_init,
     77};
     78
     79static void imx7_snvs_register_type(void)
     80{
     81    type_register_static(&imx7_snvs_info);
     82}
     83type_init(imx7_snvs_register_type)