cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

mpi.h (55601B)


      1/*-
      2 * Based on FreeBSD sys/dev/mpt/mpilib headers.
      3 *
      4 * Copyright (c) 2000-2010, LSI Logic Corporation and its contributors.
      5 * All rights reserved.
      6 *
      7 * Redistribution and use in source and binary forms, with or without
      8 * modification, are permitted provided that the following conditions are
      9 * met:
     10 * 1. Redistributions of source code must retain the above copyright
     11 *    notice, this list of conditions and the following disclaimer.
     12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
     13 *    substantially similar to the "NO WARRANTY" disclaimer below
     14 *    ("Disclaimer") and any redistribution must be conditioned upon including
     15 *    a substantially similar Disclaimer requirement for further binary
     16 *    redistribution.
     17 * 3. Neither the name of the LSI Logic Corporation nor the names of its
     18 *    contributors may be used to endorse or promote products derived from
     19 *    this software without specific prior written permission.
     20 *
     21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
     25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
     31 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32 */
     33#ifndef MPI_H
     34#define MPI_H
     35
     36enum {
     37    MPI_FUNCTION_SCSI_IO_REQUEST                = 0x00,
     38    MPI_FUNCTION_SCSI_TASK_MGMT                 = 0x01,
     39    MPI_FUNCTION_IOC_INIT                       = 0x02,
     40    MPI_FUNCTION_IOC_FACTS                      = 0x03,
     41    MPI_FUNCTION_CONFIG                         = 0x04,
     42    MPI_FUNCTION_PORT_FACTS                     = 0x05,
     43    MPI_FUNCTION_PORT_ENABLE                    = 0x06,
     44    MPI_FUNCTION_EVENT_NOTIFICATION             = 0x07,
     45    MPI_FUNCTION_EVENT_ACK                      = 0x08,
     46    MPI_FUNCTION_FW_DOWNLOAD                    = 0x09,
     47    MPI_FUNCTION_TARGET_CMD_BUFFER_POST         = 0x0A,
     48    MPI_FUNCTION_TARGET_ASSIST                  = 0x0B,
     49    MPI_FUNCTION_TARGET_STATUS_SEND             = 0x0C,
     50    MPI_FUNCTION_TARGET_MODE_ABORT              = 0x0D,
     51    MPI_FUNCTION_FC_LINK_SRVC_BUF_POST          = 0x0E,
     52    MPI_FUNCTION_FC_LINK_SRVC_RSP               = 0x0F,
     53    MPI_FUNCTION_FC_EX_LINK_SRVC_SEND           = 0x10,
     54    MPI_FUNCTION_FC_ABORT                       = 0x11,
     55    MPI_FUNCTION_FW_UPLOAD                      = 0x12,
     56    MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND       = 0x13,
     57    MPI_FUNCTION_FC_PRIMITIVE_SEND              = 0x14,
     58
     59    MPI_FUNCTION_RAID_ACTION                    = 0x15,
     60    MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH       = 0x16,
     61
     62    MPI_FUNCTION_TOOLBOX                        = 0x17,
     63
     64    MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR       = 0x18,
     65
     66    MPI_FUNCTION_MAILBOX                        = 0x19,
     67
     68    MPI_FUNCTION_SMP_PASSTHROUGH                = 0x1A,
     69    MPI_FUNCTION_SAS_IO_UNIT_CONTROL            = 0x1B,
     70    MPI_FUNCTION_SATA_PASSTHROUGH               = 0x1C,
     71
     72    MPI_FUNCTION_DIAG_BUFFER_POST               = 0x1D,
     73    MPI_FUNCTION_DIAG_RELEASE                   = 0x1E,
     74
     75    MPI_FUNCTION_SCSI_IO_32                     = 0x1F,
     76
     77    MPI_FUNCTION_LAN_SEND                       = 0x20,
     78    MPI_FUNCTION_LAN_RECEIVE                    = 0x21,
     79    MPI_FUNCTION_LAN_RESET                      = 0x22,
     80
     81    MPI_FUNCTION_TARGET_ASSIST_EXTENDED         = 0x23,
     82    MPI_FUNCTION_TARGET_CMD_BUF_BASE_POST       = 0x24,
     83    MPI_FUNCTION_TARGET_CMD_BUF_LIST_POST       = 0x25,
     84
     85    MPI_FUNCTION_INBAND_BUFFER_POST             = 0x28,
     86    MPI_FUNCTION_INBAND_SEND                    = 0x29,
     87    MPI_FUNCTION_INBAND_RSP                     = 0x2A,
     88    MPI_FUNCTION_INBAND_ABORT                   = 0x2B,
     89
     90    MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET         = 0x40,
     91    MPI_FUNCTION_IO_UNIT_RESET                  = 0x41,
     92    MPI_FUNCTION_HANDSHAKE                      = 0x42,
     93    MPI_FUNCTION_REPLY_FRAME_REMOVAL            = 0x43,
     94    MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL    = 0x44,
     95};
     96
     97/****************************************************************************/
     98/*  Registers                                                               */
     99/****************************************************************************/
    100
    101enum {
    102    MPI_IOC_STATE_RESET                 = 0x00000000,
    103    MPI_IOC_STATE_READY                 = 0x10000000,
    104    MPI_IOC_STATE_OPERATIONAL           = 0x20000000,
    105    MPI_IOC_STATE_FAULT                 = 0x40000000,
    106
    107    MPI_DOORBELL_OFFSET                 = 0x00000000,
    108    MPI_DOORBELL_ACTIVE                 = 0x08000000, /* DoorbellUsed */
    109    MPI_DOORBELL_WHO_INIT_MASK          = 0x07000000,
    110    MPI_DOORBELL_WHO_INIT_SHIFT         = 24,
    111    MPI_DOORBELL_FUNCTION_MASK          = 0xFF000000,
    112    MPI_DOORBELL_FUNCTION_SHIFT         = 24,
    113    MPI_DOORBELL_ADD_DWORDS_MASK        = 0x00FF0000,
    114    MPI_DOORBELL_ADD_DWORDS_SHIFT       = 16,
    115    MPI_DOORBELL_DATA_MASK              = 0x0000FFFF,
    116    MPI_DOORBELL_FUNCTION_SPECIFIC_MASK = 0x0000FFFF,
    117
    118    MPI_DB_HPBAC_VALUE_MASK             = 0x0000F000,
    119    MPI_DB_HPBAC_ENABLE_ACCESS          = 0x01,
    120    MPI_DB_HPBAC_DISABLE_ACCESS         = 0x02,
    121    MPI_DB_HPBAC_FREE_BUFFER            = 0x03,
    122
    123    MPI_WRITE_SEQUENCE_OFFSET           = 0x00000004,
    124    MPI_WRSEQ_KEY_VALUE_MASK            = 0x0000000F,
    125    MPI_WRSEQ_1ST_KEY_VALUE             = 0x04,
    126    MPI_WRSEQ_2ND_KEY_VALUE             = 0x0B,
    127    MPI_WRSEQ_3RD_KEY_VALUE             = 0x02,
    128    MPI_WRSEQ_4TH_KEY_VALUE             = 0x07,
    129    MPI_WRSEQ_5TH_KEY_VALUE             = 0x0D,
    130
    131    MPI_DIAGNOSTIC_OFFSET               = 0x00000008,
    132    MPI_DIAG_CLEAR_FLASH_BAD_SIG        = 0x00000400,
    133    MPI_DIAG_PREVENT_IOC_BOOT           = 0x00000200,
    134    MPI_DIAG_DRWE                       = 0x00000080,
    135    MPI_DIAG_FLASH_BAD_SIG              = 0x00000040,
    136    MPI_DIAG_RESET_HISTORY              = 0x00000020,
    137    MPI_DIAG_RW_ENABLE                  = 0x00000010,
    138    MPI_DIAG_RESET_ADAPTER              = 0x00000004,
    139    MPI_DIAG_DISABLE_ARM                = 0x00000002,
    140    MPI_DIAG_MEM_ENABLE                 = 0x00000001,
    141
    142    MPI_TEST_BASE_ADDRESS_OFFSET        = 0x0000000C,
    143
    144    MPI_DIAG_RW_DATA_OFFSET             = 0x00000010,
    145
    146    MPI_DIAG_RW_ADDRESS_OFFSET          = 0x00000014,
    147
    148    MPI_HOST_INTERRUPT_STATUS_OFFSET    = 0x00000030,
    149    MPI_HIS_IOP_DOORBELL_STATUS         = 0x80000000,
    150    MPI_HIS_REPLY_MESSAGE_INTERRUPT     = 0x00000008,
    151    MPI_HIS_DOORBELL_INTERRUPT          = 0x00000001,
    152
    153    MPI_HOST_INTERRUPT_MASK_OFFSET      = 0x00000034,
    154    MPI_HIM_RIM                         = 0x00000008,
    155    MPI_HIM_DIM                         = 0x00000001,
    156
    157    MPI_REQUEST_QUEUE_OFFSET            = 0x00000040,
    158    MPI_REQUEST_POST_FIFO_OFFSET        = 0x00000040,
    159
    160    MPI_REPLY_QUEUE_OFFSET              = 0x00000044,
    161    MPI_REPLY_POST_FIFO_OFFSET          = 0x00000044,
    162    MPI_REPLY_FREE_FIFO_OFFSET          = 0x00000044,
    163
    164    MPI_HI_PRI_REQUEST_QUEUE_OFFSET     = 0x00000048,
    165};
    166
    167#define MPI_ADDRESS_REPLY_A_BIT          0x80000000
    168
    169/****************************************************************************/
    170/*  Scatter/gather elements                                                 */
    171/****************************************************************************/
    172
    173typedef struct MPISGEntry {
    174    uint32_t                FlagsLength;
    175    union
    176    {
    177        uint32_t            Address32;
    178        uint64_t            Address64;
    179    } u;
    180} QEMU_PACKED MPISGEntry;
    181
    182/* Flags field bit definitions */
    183
    184enum {
    185    MPI_SGE_FLAGS_LAST_ELEMENT              = 0x80000000,
    186    MPI_SGE_FLAGS_END_OF_BUFFER             = 0x40000000,
    187    MPI_SGE_FLAGS_ELEMENT_TYPE_MASK         = 0x30000000,
    188    MPI_SGE_FLAGS_LOCAL_ADDRESS             = 0x08000000,
    189    MPI_SGE_FLAGS_DIRECTION                 = 0x04000000,
    190    MPI_SGE_FLAGS_64_BIT_ADDRESSING         = 0x02000000,
    191    MPI_SGE_FLAGS_END_OF_LIST               = 0x01000000,
    192
    193    MPI_SGE_LENGTH_MASK                     = 0x00FFFFFF,
    194    MPI_SGE_CHAIN_LENGTH_MASK               = 0x0000FFFF,
    195
    196    MPI_SGE_FLAGS_TRANSACTION_ELEMENT       = 0x00000000,
    197    MPI_SGE_FLAGS_SIMPLE_ELEMENT            = 0x10000000,
    198    MPI_SGE_FLAGS_CHAIN_ELEMENT             = 0x30000000,
    199
    200    /* Direction */
    201
    202    MPI_SGE_FLAGS_IOC_TO_HOST               = 0x00000000,
    203    MPI_SGE_FLAGS_HOST_TO_IOC               = 0x04000000,
    204
    205    MPI_SGE_CHAIN_OFFSET_MASK               = 0x00FF0000,
    206};
    207
    208#define MPI_SGE_CHAIN_OFFSET_SHIFT 16
    209
    210/****************************************************************************/
    211/* Standard message request header for all request messages                 */
    212/****************************************************************************/
    213
    214typedef struct MPIRequestHeader {
    215    uint8_t                 Reserved[2];      /* function specific */
    216    uint8_t                 ChainOffset;
    217    uint8_t                 Function;
    218    uint8_t                 Reserved1[3];     /* function specific */
    219    uint8_t                 MsgFlags;
    220    uint32_t                MsgContext;
    221} QEMU_PACKED MPIRequestHeader;
    222
    223
    224typedef struct MPIDefaultReply {
    225    uint8_t                 Reserved[2];      /* function specific */
    226    uint8_t                 MsgLength;
    227    uint8_t                 Function;
    228    uint8_t                 Reserved1[3];     /* function specific */
    229    uint8_t                 MsgFlags;
    230    uint32_t                MsgContext;
    231    uint8_t                 Reserved2[2];     /* function specific */
    232    uint16_t                IOCStatus;
    233    uint32_t                IOCLogInfo;
    234} QEMU_PACKED MPIDefaultReply;
    235
    236/* MsgFlags definition for all replies */
    237
    238#define MPI_MSGFLAGS_CONTINUATION_REPLY         (0x80)
    239
    240enum {
    241
    242    /************************************************************************/
    243    /*  Common IOCStatus values for all replies                             */
    244    /************************************************************************/
    245
    246    MPI_IOCSTATUS_SUCCESS                   = 0x0000,
    247    MPI_IOCSTATUS_INVALID_FUNCTION          = 0x0001,
    248    MPI_IOCSTATUS_BUSY                      = 0x0002,
    249    MPI_IOCSTATUS_INVALID_SGL               = 0x0003,
    250    MPI_IOCSTATUS_INTERNAL_ERROR            = 0x0004,
    251    MPI_IOCSTATUS_RESERVED                  = 0x0005,
    252    MPI_IOCSTATUS_INSUFFICIENT_RESOURCES    = 0x0006,
    253    MPI_IOCSTATUS_INVALID_FIELD             = 0x0007,
    254    MPI_IOCSTATUS_INVALID_STATE             = 0x0008,
    255    MPI_IOCSTATUS_OP_STATE_NOT_SUPPORTED    = 0x0009,
    256
    257    /************************************************************************/
    258    /*  Config IOCStatus values                                             */
    259    /************************************************************************/
    260
    261    MPI_IOCSTATUS_CONFIG_INVALID_ACTION     = 0x0020,
    262    MPI_IOCSTATUS_CONFIG_INVALID_TYPE       = 0x0021,
    263    MPI_IOCSTATUS_CONFIG_INVALID_PAGE       = 0x0022,
    264    MPI_IOCSTATUS_CONFIG_INVALID_DATA       = 0x0023,
    265    MPI_IOCSTATUS_CONFIG_NO_DEFAULTS        = 0x0024,
    266    MPI_IOCSTATUS_CONFIG_CANT_COMMIT        = 0x0025,
    267
    268    /************************************************************************/
    269    /*  SCSIIO Reply = SPI & FCP, initiator values                           */
    270    /************************************************************************/
    271
    272    MPI_IOCSTATUS_SCSI_RECOVERED_ERROR      = 0x0040,
    273    MPI_IOCSTATUS_SCSI_INVALID_BUS          = 0x0041,
    274    MPI_IOCSTATUS_SCSI_INVALID_TARGETID     = 0x0042,
    275    MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE     = 0x0043,
    276    MPI_IOCSTATUS_SCSI_DATA_OVERRUN         = 0x0044,
    277    MPI_IOCSTATUS_SCSI_DATA_UNDERRUN        = 0x0045,
    278    MPI_IOCSTATUS_SCSI_IO_DATA_ERROR        = 0x0046,
    279    MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR       = 0x0047,
    280    MPI_IOCSTATUS_SCSI_TASK_TERMINATED      = 0x0048,
    281    MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH    = 0x0049,
    282    MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED     = 0x004A,
    283    MPI_IOCSTATUS_SCSI_IOC_TERMINATED       = 0x004B,
    284    MPI_IOCSTATUS_SCSI_EXT_TERMINATED       = 0x004C,
    285
    286    /************************************************************************/
    287    /*  For use by SCSI Initiator and SCSI Target end-to-end data protection*/
    288    /************************************************************************/
    289
    290    MPI_IOCSTATUS_EEDP_GUARD_ERROR          = 0x004D,
    291    MPI_IOCSTATUS_EEDP_REF_TAG_ERROR        = 0x004E,
    292    MPI_IOCSTATUS_EEDP_APP_TAG_ERROR        = 0x004F,
    293
    294    /************************************************************************/
    295    /*  SCSI Target values                                                  */
    296    /************************************************************************/
    297
    298    MPI_IOCSTATUS_TARGET_PRIORITY_IO         = 0x0060,
    299    MPI_IOCSTATUS_TARGET_INVALID_PORT        = 0x0061,
    300    MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX    = 0x0062,
    301    MPI_IOCSTATUS_TARGET_ABORTED             = 0x0063,
    302    MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE   = 0x0064,
    303    MPI_IOCSTATUS_TARGET_NO_CONNECTION       = 0x0065,
    304    MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH = 0x006A,
    305    MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT   = 0x006B,
    306    MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR   = 0x006D,
    307    MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA = 0x006E,
    308    MPI_IOCSTATUS_TARGET_IU_TOO_SHORT        = 0x006F,
    309    MPI_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT     = 0x0070,
    310    MPI_IOCSTATUS_TARGET_NAK_RECEIVED        = 0x0071,
    311
    312    /************************************************************************/
    313    /*  Fibre Channel Direct Access values                                  */
    314    /************************************************************************/
    315
    316    MPI_IOCSTATUS_FC_ABORTED                = 0x0066,
    317    MPI_IOCSTATUS_FC_RX_ID_INVALID          = 0x0067,
    318    MPI_IOCSTATUS_FC_DID_INVALID            = 0x0068,
    319    MPI_IOCSTATUS_FC_NODE_LOGGED_OUT        = 0x0069,
    320    MPI_IOCSTATUS_FC_EXCHANGE_CANCELED      = 0x006C,
    321
    322    /************************************************************************/
    323    /*  LAN values                                                          */
    324    /************************************************************************/
    325
    326    MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND      = 0x0080,
    327    MPI_IOCSTATUS_LAN_DEVICE_FAILURE        = 0x0081,
    328    MPI_IOCSTATUS_LAN_TRANSMIT_ERROR        = 0x0082,
    329    MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED      = 0x0083,
    330    MPI_IOCSTATUS_LAN_RECEIVE_ERROR         = 0x0084,
    331    MPI_IOCSTATUS_LAN_RECEIVE_ABORTED       = 0x0085,
    332    MPI_IOCSTATUS_LAN_PARTIAL_PACKET        = 0x0086,
    333    MPI_IOCSTATUS_LAN_CANCELED              = 0x0087,
    334
    335    /************************************************************************/
    336    /*  Serial Attached SCSI values                                         */
    337    /************************************************************************/
    338
    339    MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED    = 0x0090,
    340    MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN      = 0x0091,
    341
    342    /************************************************************************/
    343    /*  Inband values                                                       */
    344    /************************************************************************/
    345
    346    MPI_IOCSTATUS_INBAND_ABORTED            = 0x0098,
    347    MPI_IOCSTATUS_INBAND_NO_CONNECTION      = 0x0099,
    348
    349    /************************************************************************/
    350    /*  Diagnostic Tools values                                             */
    351    /************************************************************************/
    352
    353    MPI_IOCSTATUS_DIAGNOSTIC_RELEASED       = 0x00A0,
    354
    355    /************************************************************************/
    356    /*  IOCStatus flag to indicate that log info is available               */
    357    /************************************************************************/
    358
    359    MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE   = 0x8000,
    360    MPI_IOCSTATUS_MASK                      = 0x7FFF,
    361
    362    /************************************************************************/
    363    /*  LogInfo Types                                                       */
    364    /************************************************************************/
    365
    366    MPI_IOCLOGINFO_TYPE_MASK                = 0xF0000000,
    367    MPI_IOCLOGINFO_TYPE_SHIFT               = 28,
    368    MPI_IOCLOGINFO_TYPE_NONE                = 0x0,
    369    MPI_IOCLOGINFO_TYPE_SCSI                = 0x1,
    370    MPI_IOCLOGINFO_TYPE_FC                  = 0x2,
    371    MPI_IOCLOGINFO_TYPE_SAS                 = 0x3,
    372    MPI_IOCLOGINFO_TYPE_ISCSI               = 0x4,
    373    MPI_IOCLOGINFO_LOG_DATA_MASK            = 0x0FFFFFFF,
    374};
    375
    376/****************************************************************************/
    377/*  SCSI IO messages and associated structures                              */
    378/****************************************************************************/
    379
    380typedef struct MPIMsgSCSIIORequest {
    381    uint8_t                 TargetID;           /* 00h */
    382    uint8_t                 Bus;                /* 01h */
    383    uint8_t                 ChainOffset;        /* 02h */
    384    uint8_t                 Function;           /* 03h */
    385    uint8_t                 CDBLength;          /* 04h */
    386    uint8_t                 SenseBufferLength;  /* 05h */
    387    uint8_t                 Reserved;           /* 06h */
    388    uint8_t                 MsgFlags;           /* 07h */
    389    uint32_t                MsgContext;         /* 08h */
    390    uint8_t                 LUN[8];             /* 0Ch */
    391    uint32_t                Control;            /* 14h */
    392    uint8_t                 CDB[16];            /* 18h */
    393    uint32_t                DataLength;         /* 28h */
    394    uint32_t                SenseBufferLowAddr; /* 2Ch */
    395} QEMU_PACKED MPIMsgSCSIIORequest;
    396
    397/* SCSI IO MsgFlags bits */
    398
    399#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH              (0x01)
    400#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32           (0x00)
    401#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64           (0x01)
    402
    403#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION           (0x02)
    404#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST           (0x00)
    405#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC            (0x02)
    406
    407#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR  (0x04)
    408
    409/* SCSI IO LUN fields */
    410
    411#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING   (0x0000FFFF)
    412#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING  (0xFFFF0000)
    413#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING   (0x0000FFFF)
    414#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING  (0xFFFF0000)
    415#define MPI_SCSIIO_LUN_LEVEL_1_WORD             (0xFF00)
    416#define MPI_SCSIIO_LUN_LEVEL_1_DWORD            (0x0000FF00)
    417
    418/* SCSI IO Control bits */
    419
    420#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK   (0x03000000)
    421#define MPI_SCSIIO_CONTROL_NODATATRANSFER       (0x00000000)
    422#define MPI_SCSIIO_CONTROL_WRITE                (0x01000000)
    423#define MPI_SCSIIO_CONTROL_READ                 (0x02000000)
    424
    425#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK       (0x3C000000)
    426#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT      (26)
    427
    428#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK   (0x00000700)
    429#define MPI_SCSIIO_CONTROL_SIMPLEQ              (0x00000000)
    430#define MPI_SCSIIO_CONTROL_HEADOFQ              (0x00000100)
    431#define MPI_SCSIIO_CONTROL_ORDEREDQ             (0x00000200)
    432#define MPI_SCSIIO_CONTROL_ACAQ                 (0x00000400)
    433#define MPI_SCSIIO_CONTROL_UNTAGGED             (0x00000500)
    434#define MPI_SCSIIO_CONTROL_NO_DISCONNECT        (0x00000700)
    435
    436#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK      (0x00FF0000)
    437#define MPI_SCSIIO_CONTROL_OBSOLETE             (0x00800000)
    438#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV        (0x00400000)
    439#define MPI_SCSIIO_CONTROL_TARGET_RESET         (0x00200000)
    440#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV        (0x00100000)
    441#define MPI_SCSIIO_CONTROL_RESERVED             (0x00080000)
    442#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV     (0x00040000)
    443#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET       (0x00020000)
    444#define MPI_SCSIIO_CONTROL_RESERVED2            (0x00010000)
    445
    446/* SCSI IO reply structure */
    447typedef struct MPIMsgSCSIIOReply
    448{
    449    uint8_t                 TargetID;           /* 00h */
    450    uint8_t                 Bus;                /* 01h */
    451    uint8_t                 MsgLength;          /* 02h */
    452    uint8_t                 Function;           /* 03h */
    453    uint8_t                 CDBLength;          /* 04h */
    454    uint8_t                 SenseBufferLength;  /* 05h */
    455    uint8_t                 Reserved;           /* 06h */
    456    uint8_t                 MsgFlags;           /* 07h */
    457    uint32_t                MsgContext;         /* 08h */
    458    uint8_t                 SCSIStatus;         /* 0Ch */
    459    uint8_t                 SCSIState;          /* 0Dh */
    460    uint16_t                IOCStatus;          /* 0Eh */
    461    uint32_t                IOCLogInfo;         /* 10h */
    462    uint32_t                TransferCount;      /* 14h */
    463    uint32_t                SenseCount;         /* 18h */
    464    uint32_t                ResponseInfo;       /* 1Ch */
    465    uint16_t                TaskTag;            /* 20h */
    466    uint16_t                Reserved1;          /* 22h */
    467} QEMU_PACKED MPIMsgSCSIIOReply;
    468
    469/* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */
    470
    471#define MPI_SCSI_STATUS_SUCCESS                 (0x00)
    472#define MPI_SCSI_STATUS_CHECK_CONDITION         (0x02)
    473#define MPI_SCSI_STATUS_CONDITION_MET           (0x04)
    474#define MPI_SCSI_STATUS_BUSY                    (0x08)
    475#define MPI_SCSI_STATUS_INTERMEDIATE            (0x10)
    476#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET    (0x14)
    477#define MPI_SCSI_STATUS_RESERVATION_CONFLICT    (0x18)
    478#define MPI_SCSI_STATUS_COMMAND_TERMINATED      (0x22)
    479#define MPI_SCSI_STATUS_TASK_SET_FULL           (0x28)
    480#define MPI_SCSI_STATUS_ACA_ACTIVE              (0x30)
    481
    482#define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT    (0x80)
    483#define MPI_SCSI_STATUS_FCPEXT_NO_LINK              (0x81)
    484#define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED           (0x82)
    485
    486
    487/* SCSI IO Reply SCSIState values */
    488
    489#define MPI_SCSI_STATE_AUTOSENSE_VALID          (0x01)
    490#define MPI_SCSI_STATE_AUTOSENSE_FAILED         (0x02)
    491#define MPI_SCSI_STATE_NO_SCSI_STATUS           (0x04)
    492#define MPI_SCSI_STATE_TERMINATED               (0x08)
    493#define MPI_SCSI_STATE_RESPONSE_INFO_VALID      (0x10)
    494#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED       (0x20)
    495
    496/* SCSI IO Reply ResponseInfo values */
    497/* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */
    498
    499#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE     (0x00000000)
    500#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR   (0x01000000)
    501#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID   (0x02000000)
    502#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR     (0x03000000)
    503#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
    504#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED      (0x05000000)
    505#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE   (0x06000000)
    506
    507#define MPI_SCSI_TASKTAG_UNKNOWN                (0xFFFF)
    508
    509
    510/****************************************************************************/
    511/*  SCSI Task Management messages                                           */
    512/****************************************************************************/
    513
    514typedef struct MPIMsgSCSITaskMgmt {
    515    uint8_t                 TargetID;           /* 00h */
    516    uint8_t                 Bus;                /* 01h */
    517    uint8_t                 ChainOffset;        /* 02h */
    518    uint8_t                 Function;           /* 03h */
    519    uint8_t                 Reserved;           /* 04h */
    520    uint8_t                 TaskType;           /* 05h */
    521    uint8_t                 Reserved1;          /* 06h */
    522    uint8_t                 MsgFlags;           /* 07h */
    523    uint32_t                MsgContext;         /* 08h */
    524    uint8_t                 LUN[8];             /* 0Ch */
    525    uint32_t                Reserved2[7];       /* 14h */
    526    uint32_t                TaskMsgContext;     /* 30h */
    527} QEMU_PACKED MPIMsgSCSITaskMgmt;
    528
    529enum {
    530    /* TaskType values */
    531
    532    MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK            = 0x01,
    533    MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET         = 0x02,
    534    MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET          = 0x03,
    535    MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS             = 0x04,
    536    MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET    = 0x05,
    537    MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET        = 0x06,
    538    MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK            = 0x07,
    539    MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA               = 0x08,
    540
    541    /* MsgFlags bits */
    542
    543    MPI_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU   = 0x01,
    544
    545    MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION   = 0x00,
    546    MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION      = 0x02,
    547    MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION = 0x04,
    548
    549    MPI_SCSITASKMGMT_MSGFLAGS_SOFT_RESET_OPTION     = 0x08,
    550};
    551
    552/* SCSI Task Management Reply */
    553typedef struct MPIMsgSCSITaskMgmtReply {
    554    uint8_t                 TargetID;           /* 00h */
    555    uint8_t                 Bus;                /* 01h */
    556    uint8_t                 MsgLength;          /* 02h */
    557    uint8_t                 Function;           /* 03h */
    558    uint8_t                 ResponseCode;       /* 04h */
    559    uint8_t                 TaskType;           /* 05h */
    560    uint8_t                 Reserved1;          /* 06h */
    561    uint8_t                 MsgFlags;           /* 07h */
    562    uint32_t                MsgContext;         /* 08h */
    563    uint8_t                 Reserved2[2];       /* 0Ch */
    564    uint16_t                IOCStatus;          /* 0Eh */
    565    uint32_t                IOCLogInfo;         /* 10h */
    566    uint32_t                TerminationCount;   /* 14h */
    567} QEMU_PACKED MPIMsgSCSITaskMgmtReply;
    568
    569/* ResponseCode values */
    570enum {
    571    MPI_SCSITASKMGMT_RSP_TM_COMPLETE                = 0x00,
    572    MPI_SCSITASKMGMT_RSP_INVALID_FRAME              = 0x02,
    573    MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED           = 0x04,
    574    MPI_SCSITASKMGMT_RSP_TM_FAILED                  = 0x05,
    575    MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED               = 0x08,
    576    MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN             = 0x09,
    577    MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC           = 0x80,
    578};
    579
    580/****************************************************************************/
    581/*  IOCInit message                                                         */
    582/****************************************************************************/
    583
    584typedef struct MPIMsgIOCInit {
    585    uint8_t                 WhoInit;                    /* 00h */
    586    uint8_t                 Reserved;                   /* 01h */
    587    uint8_t                 ChainOffset;                /* 02h */
    588    uint8_t                 Function;                   /* 03h */
    589    uint8_t                 Flags;                      /* 04h */
    590    uint8_t                 MaxDevices;                 /* 05h */
    591    uint8_t                 MaxBuses;                   /* 06h */
    592    uint8_t                 MsgFlags;                   /* 07h */
    593    uint32_t                MsgContext;                 /* 08h */
    594    uint16_t                ReplyFrameSize;             /* 0Ch */
    595    uint8_t                 Reserved1[2];               /* 0Eh */
    596    uint32_t                HostMfaHighAddr;            /* 10h */
    597    uint32_t                SenseBufferHighAddr;        /* 14h */
    598    uint32_t                ReplyFifoHostSignalingAddr; /* 18h */
    599    MPISGEntry              HostPageBufferSGE;          /* 1Ch */
    600    uint16_t                MsgVersion;                 /* 28h */
    601    uint16_t                HeaderVersion;              /* 2Ah */
    602} QEMU_PACKED MPIMsgIOCInit;
    603
    604enum {
    605    /* WhoInit values */
    606
    607    MPI_WHOINIT_NO_ONE                              = 0x00,
    608    MPI_WHOINIT_SYSTEM_BIOS                         = 0x01,
    609    MPI_WHOINIT_ROM_BIOS                            = 0x02,
    610    MPI_WHOINIT_PCI_PEER                            = 0x03,
    611    MPI_WHOINIT_HOST_DRIVER                         = 0x04,
    612    MPI_WHOINIT_MANUFACTURER                        = 0x05,
    613
    614    /* Flags values */
    615
    616    MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT   = 0x04,
    617    MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL        = 0x02,
    618    MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE              = 0x01,
    619
    620    /* MsgVersion */
    621
    622    MPI_IOCINIT_MSGVERSION_MAJOR_MASK               = 0xFF00,
    623    MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT              = 8,
    624    MPI_IOCINIT_MSGVERSION_MINOR_MASK               = 0x00FF,
    625    MPI_IOCINIT_MSGVERSION_MINOR_SHIFT              = 0,
    626
    627    /* HeaderVersion */
    628
    629    MPI_IOCINIT_HEADERVERSION_UNIT_MASK             = 0xFF00,
    630    MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT            = 8,
    631    MPI_IOCINIT_HEADERVERSION_DEV_MASK              = 0x00FF,
    632    MPI_IOCINIT_HEADERVERSION_DEV_SHIFT             = 0,
    633};
    634
    635typedef struct MPIMsgIOCInitReply {
    636    uint8_t                 WhoInit;                    /* 00h */
    637    uint8_t                 Reserved;                   /* 01h */
    638    uint8_t                 MsgLength;                  /* 02h */
    639    uint8_t                 Function;                   /* 03h */
    640    uint8_t                 Flags;                      /* 04h */
    641    uint8_t                 MaxDevices;                 /* 05h */
    642    uint8_t                 MaxBuses;                   /* 06h */
    643    uint8_t                 MsgFlags;                   /* 07h */
    644    uint32_t                MsgContext;                 /* 08h */
    645    uint16_t                Reserved2;                  /* 0Ch */
    646    uint16_t                IOCStatus;                  /* 0Eh */
    647    uint32_t                IOCLogInfo;                 /* 10h */
    648} QEMU_PACKED MPIMsgIOCInitReply;
    649
    650
    651
    652/****************************************************************************/
    653/*  IOC Facts message                                                       */
    654/****************************************************************************/
    655
    656typedef struct MPIMsgIOCFacts {
    657    uint8_t                 Reserved[2];                /* 00h */
    658    uint8_t                 ChainOffset;                /* 01h */
    659    uint8_t                 Function;                   /* 02h */
    660    uint8_t                 Reserved1[3];               /* 03h */
    661    uint8_t                 MsgFlags;                   /* 04h */
    662    uint32_t                MsgContext;                 /* 08h */
    663} QEMU_PACKED MPIMsgIOCFacts;
    664
    665/* IOC Facts Reply */
    666typedef struct MPIMsgIOCFactsReply {
    667    uint16_t                MsgVersion;                 /* 00h */
    668    uint8_t                 MsgLength;                  /* 02h */
    669    uint8_t                 Function;                   /* 03h */
    670    uint16_t                HeaderVersion;              /* 04h */
    671    uint8_t                 IOCNumber;                  /* 06h */
    672    uint8_t                 MsgFlags;                   /* 07h */
    673    uint32_t                MsgContext;                 /* 08h */
    674    uint16_t                IOCExceptions;              /* 0Ch */
    675    uint16_t                IOCStatus;                  /* 0Eh */
    676    uint32_t                IOCLogInfo;                 /* 10h */
    677    uint8_t                 MaxChainDepth;              /* 14h */
    678    uint8_t                 WhoInit;                    /* 15h */
    679    uint8_t                 BlockSize;                  /* 16h */
    680    uint8_t                 Flags;                      /* 17h */
    681    uint16_t                ReplyQueueDepth;            /* 18h */
    682    uint16_t                RequestFrameSize;           /* 1Ah */
    683    uint16_t                Reserved_0101_FWVersion;    /* 1Ch */ /* obsolete 16-bit FWVersion */
    684    uint16_t                ProductID;                  /* 1Eh */
    685    uint32_t                CurrentHostMfaHighAddr;     /* 20h */
    686    uint16_t                GlobalCredits;              /* 24h */
    687    uint8_t                 NumberOfPorts;              /* 26h */
    688    uint8_t                 EventState;                 /* 27h */
    689    uint32_t                CurrentSenseBufferHighAddr; /* 28h */
    690    uint16_t                CurReplyFrameSize;          /* 2Ch */
    691    uint8_t                 MaxDevices;                 /* 2Eh */
    692    uint8_t                 MaxBuses;                   /* 2Fh */
    693    uint32_t                FWImageSize;                /* 30h */
    694    uint32_t                IOCCapabilities;            /* 34h */
    695    uint8_t                 FWVersionDev;               /* 38h */
    696    uint8_t                 FWVersionUnit;              /* 39h */
    697    uint8_t                 FWVersionMinor;             /* 3ah */
    698    uint8_t                 FWVersionMajor;             /* 3bh */
    699    uint16_t                HighPriorityQueueDepth;     /* 3Ch */
    700    uint16_t                Reserved2;                  /* 3Eh */
    701    MPISGEntry              HostPageBufferSGE;          /* 40h */
    702    uint32_t                ReplyFifoHostSignalingAddr; /* 4Ch */
    703} QEMU_PACKED MPIMsgIOCFactsReply;
    704
    705enum {
    706    MPI_IOCFACTS_MSGVERSION_MAJOR_MASK              = 0xFF00,
    707    MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT             = 8,
    708    MPI_IOCFACTS_MSGVERSION_MINOR_MASK              = 0x00FF,
    709    MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT             = 0,
    710
    711    MPI_IOCFACTS_HDRVERSION_UNIT_MASK               = 0xFF00,
    712    MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT              = 8,
    713    MPI_IOCFACTS_HDRVERSION_DEV_MASK                = 0x00FF,
    714    MPI_IOCFACTS_HDRVERSION_DEV_SHIFT               = 0,
    715
    716    MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL        = 0x0001,
    717    MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID         = 0x0002,
    718    MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL            = 0x0004,
    719    MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL       = 0x0008,
    720    MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED        = 0x0010,
    721
    722    MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT             = 0x01,
    723    MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL       = 0x02,
    724    MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT  = 0x04,
    725
    726    MPI_IOCFACTS_EVENTSTATE_DISABLED                = 0x00,
    727    MPI_IOCFACTS_EVENTSTATE_ENABLED                 = 0x01,
    728
    729    MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q              = 0x00000001,
    730    MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL       = 0x00000002,
    731    MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING     = 0x00000004,
    732    MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER       = 0x00000008,
    733    MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER         = 0x00000010,
    734    MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER         = 0x00000020,
    735    MPI_IOCFACTS_CAPABILITY_EEDP                    = 0x00000040,
    736    MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL           = 0x00000080,
    737    MPI_IOCFACTS_CAPABILITY_MULTICAST               = 0x00000100,
    738    MPI_IOCFACTS_CAPABILITY_SCSIIO32                = 0x00000200,
    739    MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16             = 0x00000400,
    740    MPI_IOCFACTS_CAPABILITY_TLR                     = 0x00000800,
    741};
    742
    743/****************************************************************************/
    744/*  Port Facts message and Reply                                            */
    745/****************************************************************************/
    746
    747typedef struct MPIMsgPortFacts {
    748     uint8_t                Reserved[2];                /* 00h */
    749     uint8_t                ChainOffset;                /* 02h */
    750     uint8_t                Function;                   /* 03h */
    751     uint8_t                Reserved1[2];               /* 04h */
    752     uint8_t                PortNumber;                 /* 06h */
    753     uint8_t                MsgFlags;                   /* 07h */
    754     uint32_t               MsgContext;                 /* 08h */
    755} QEMU_PACKED MPIMsgPortFacts;
    756
    757typedef struct MPIMsgPortFactsReply {
    758     uint16_t               Reserved;                   /* 00h */
    759     uint8_t                MsgLength;                  /* 02h */
    760     uint8_t                Function;                   /* 03h */
    761     uint16_t               Reserved1;                  /* 04h */
    762     uint8_t                PortNumber;                 /* 06h */
    763     uint8_t                MsgFlags;                   /* 07h */
    764     uint32_t               MsgContext;                 /* 08h */
    765     uint16_t               Reserved2;                  /* 0Ch */
    766     uint16_t               IOCStatus;                  /* 0Eh */
    767     uint32_t               IOCLogInfo;                 /* 10h */
    768     uint8_t                Reserved3;                  /* 14h */
    769     uint8_t                PortType;                   /* 15h */
    770     uint16_t               MaxDevices;                 /* 16h */
    771     uint16_t               PortSCSIID;                 /* 18h */
    772     uint16_t               ProtocolFlags;              /* 1Ah */
    773     uint16_t               MaxPostedCmdBuffers;        /* 1Ch */
    774     uint16_t               MaxPersistentIDs;           /* 1Eh */
    775     uint16_t               MaxLanBuckets;              /* 20h */
    776     uint8_t                MaxInitiators;              /* 22h */
    777     uint8_t                Reserved4;                  /* 23h */
    778     uint32_t               Reserved5;                  /* 24h */
    779} QEMU_PACKED MPIMsgPortFactsReply;
    780
    781
    782enum {
    783    /* PortTypes values */
    784    MPI_PORTFACTS_PORTTYPE_INACTIVE         = 0x00,
    785    MPI_PORTFACTS_PORTTYPE_SCSI             = 0x01,
    786    MPI_PORTFACTS_PORTTYPE_FC               = 0x10,
    787    MPI_PORTFACTS_PORTTYPE_ISCSI            = 0x20,
    788    MPI_PORTFACTS_PORTTYPE_SAS              = 0x30,
    789
    790    /* ProtocolFlags values */
    791    MPI_PORTFACTS_PROTOCOL_LOGBUSADDR       = 0x01,
    792    MPI_PORTFACTS_PROTOCOL_LAN              = 0x02,
    793    MPI_PORTFACTS_PROTOCOL_TARGET           = 0x04,
    794    MPI_PORTFACTS_PROTOCOL_INITIATOR        = 0x08,
    795};
    796
    797
    798/****************************************************************************/
    799/*  Port Enable Message                                                     */
    800/****************************************************************************/
    801
    802typedef struct MPIMsgPortEnable {
    803    uint8_t                 Reserved[2];                /* 00h */
    804    uint8_t                 ChainOffset;                /* 02h */
    805    uint8_t                 Function;                   /* 03h */
    806    uint8_t                 Reserved1[2];               /* 04h */
    807    uint8_t                 PortNumber;                 /* 06h */
    808    uint8_t                 MsgFlags;                   /* 07h */
    809    uint32_t                MsgContext;                 /* 08h */
    810} QEMU_PACKED MPIMsgPortEnable;
    811
    812typedef struct MPIMsgPortEnableReply {
    813    uint8_t                 Reserved[2];                /* 00h */
    814    uint8_t                 MsgLength;                  /* 02h */
    815    uint8_t                 Function;                   /* 03h */
    816    uint8_t                 Reserved1[2];               /* 04h */
    817    uint8_t                 PortNumber;                 /* 05h */
    818    uint8_t                 MsgFlags;                   /* 07h */
    819    uint32_t                MsgContext;                 /* 08h */
    820    uint16_t                Reserved2;                  /* 0Ch */
    821    uint16_t                IOCStatus;                  /* 0Eh */
    822    uint32_t                IOCLogInfo;                 /* 10h */
    823} QEMU_PACKED MPIMsgPortEnableReply;
    824
    825/****************************************************************************/
    826/*  Event Notification messages                                             */
    827/****************************************************************************/
    828
    829typedef struct MPIMsgEventNotify {
    830    uint8_t                 Switch;                     /* 00h */
    831    uint8_t                 Reserved;                   /* 01h */
    832    uint8_t                 ChainOffset;                /* 02h */
    833    uint8_t                 Function;                   /* 03h */
    834    uint8_t                 Reserved1[3];               /* 04h */
    835    uint8_t                 MsgFlags;                   /* 07h */
    836    uint32_t                MsgContext;                 /* 08h */
    837} QEMU_PACKED MPIMsgEventNotify;
    838
    839/* Event Notification Reply */
    840
    841typedef struct MPIMsgEventNotifyReply {
    842     uint16_t               EventDataLength;            /* 00h */
    843     uint8_t                MsgLength;                  /* 02h */
    844     uint8_t                Function;                   /* 03h */
    845     uint8_t                Reserved1[2];               /* 04h */
    846     uint8_t                AckRequired;                /* 06h */
    847     uint8_t                MsgFlags;                   /* 07h */
    848     uint32_t               MsgContext;                 /* 08h */
    849     uint8_t                Reserved2[2];               /* 0Ch */
    850     uint16_t               IOCStatus;                  /* 0Eh */
    851     uint32_t               IOCLogInfo;                 /* 10h */
    852     uint32_t               Event;                      /* 14h */
    853     uint32_t               EventContext;               /* 18h */
    854     uint32_t               Data[1];                    /* 1Ch */
    855} QEMU_PACKED MPIMsgEventNotifyReply;
    856
    857/* Event Acknowledge */
    858
    859typedef struct MPIMsgEventAck {
    860    uint8_t                 Reserved[2];                /* 00h */
    861    uint8_t                 ChainOffset;                /* 02h */
    862    uint8_t                 Function;                   /* 03h */
    863    uint8_t                 Reserved1[3];               /* 04h */
    864    uint8_t                 MsgFlags;                   /* 07h */
    865    uint32_t                MsgContext;                 /* 08h */
    866    uint32_t                Event;                      /* 0Ch */
    867    uint32_t                EventContext;               /* 10h */
    868} QEMU_PACKED MPIMsgEventAck;
    869
    870typedef struct MPIMsgEventAckReply {
    871    uint8_t                 Reserved[2];                /* 00h */
    872    uint8_t                 MsgLength;                  /* 02h */
    873    uint8_t                 Function;                   /* 03h */
    874    uint8_t                 Reserved1[3];               /* 04h */
    875    uint8_t                 MsgFlags;                   /* 07h */
    876    uint32_t                MsgContext;                 /* 08h */
    877    uint16_t                Reserved2;                  /* 0Ch */
    878    uint16_t                IOCStatus;                  /* 0Eh */
    879    uint32_t                IOCLogInfo;                 /* 10h */
    880} QEMU_PACKED MPIMsgEventAckReply;
    881
    882enum {
    883    /* Switch */
    884
    885    MPI_EVENT_NOTIFICATION_SWITCH_OFF   = 0x00,
    886    MPI_EVENT_NOTIFICATION_SWITCH_ON    = 0x01,
    887
    888    /* Event */
    889
    890    MPI_EVENT_NONE                          = 0x00000000,
    891    MPI_EVENT_LOG_DATA                      = 0x00000001,
    892    MPI_EVENT_STATE_CHANGE                  = 0x00000002,
    893    MPI_EVENT_UNIT_ATTENTION                = 0x00000003,
    894    MPI_EVENT_IOC_BUS_RESET                 = 0x00000004,
    895    MPI_EVENT_EXT_BUS_RESET                 = 0x00000005,
    896    MPI_EVENT_RESCAN                        = 0x00000006,
    897    MPI_EVENT_LINK_STATUS_CHANGE            = 0x00000007,
    898    MPI_EVENT_LOOP_STATE_CHANGE             = 0x00000008,
    899    MPI_EVENT_LOGOUT                        = 0x00000009,
    900    MPI_EVENT_EVENT_CHANGE                  = 0x0000000A,
    901    MPI_EVENT_INTEGRATED_RAID               = 0x0000000B,
    902    MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE     = 0x0000000C,
    903    MPI_EVENT_ON_BUS_TIMER_EXPIRED          = 0x0000000D,
    904    MPI_EVENT_QUEUE_FULL                    = 0x0000000E,
    905    MPI_EVENT_SAS_DEVICE_STATUS_CHANGE      = 0x0000000F,
    906    MPI_EVENT_SAS_SES                       = 0x00000010,
    907    MPI_EVENT_PERSISTENT_TABLE_FULL         = 0x00000011,
    908    MPI_EVENT_SAS_PHY_LINK_STATUS           = 0x00000012,
    909    MPI_EVENT_SAS_DISCOVERY_ERROR           = 0x00000013,
    910    MPI_EVENT_IR_RESYNC_UPDATE              = 0x00000014,
    911    MPI_EVENT_IR2                           = 0x00000015,
    912    MPI_EVENT_SAS_DISCOVERY                 = 0x00000016,
    913    MPI_EVENT_SAS_BROADCAST_PRIMITIVE       = 0x00000017,
    914    MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE = 0x00000018,
    915    MPI_EVENT_SAS_INIT_TABLE_OVERFLOW       = 0x00000019,
    916    MPI_EVENT_SAS_SMP_ERROR                 = 0x0000001A,
    917    MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE    = 0x0000001B,
    918    MPI_EVENT_LOG_ENTRY_ADDED               = 0x00000021,
    919
    920    /* AckRequired field values */
    921
    922    MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED = 0x00,
    923    MPI_EVENT_NOTIFICATION_ACK_REQUIRED     = 0x01,
    924};
    925
    926/****************************************************************************
    927*   Config Request Message
    928****************************************************************************/
    929
    930typedef struct MPIMsgConfig {
    931    uint8_t                 Action;                     /* 00h */
    932    uint8_t                 Reserved;                   /* 01h */
    933    uint8_t                 ChainOffset;                /* 02h */
    934    uint8_t                 Function;                   /* 03h */
    935    uint16_t                ExtPageLength;              /* 04h */
    936    uint8_t                 ExtPageType;                /* 06h */
    937    uint8_t                 MsgFlags;                   /* 07h */
    938    uint32_t                MsgContext;                 /* 08h */
    939    uint8_t                 Reserved2[8];               /* 0Ch */
    940    uint8_t                 PageVersion;                /* 14h */
    941    uint8_t                 PageLength;                 /* 15h */
    942    uint8_t                 PageNumber;                 /* 16h */
    943    uint8_t                 PageType;                   /* 17h */
    944    uint32_t                PageAddress;                /* 18h */
    945    MPISGEntry              PageBufferSGE;              /* 1Ch */
    946} QEMU_PACKED MPIMsgConfig;
    947
    948/* Action field values */
    949
    950enum {
    951    MPI_CONFIG_ACTION_PAGE_HEADER               = 0x00,
    952    MPI_CONFIG_ACTION_PAGE_READ_CURRENT         = 0x01,
    953    MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT        = 0x02,
    954    MPI_CONFIG_ACTION_PAGE_DEFAULT              = 0x03,
    955    MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM          = 0x04,
    956    MPI_CONFIG_ACTION_PAGE_READ_DEFAULT         = 0x05,
    957    MPI_CONFIG_ACTION_PAGE_READ_NVRAM           = 0x06,
    958};
    959
    960
    961/* Config Reply Message */
    962typedef struct MPIMsgConfigReply {
    963    uint8_t                 Action;                     /* 00h */
    964    uint8_t                 Reserved;                   /* 01h */
    965    uint8_t                 MsgLength;                  /* 02h */
    966    uint8_t                 Function;                   /* 03h */
    967    uint16_t                ExtPageLength;              /* 04h */
    968    uint8_t                 ExtPageType;                /* 06h */
    969    uint8_t                 MsgFlags;                   /* 07h */
    970    uint32_t                MsgContext;                 /* 08h */
    971    uint8_t                 Reserved2[2];               /* 0Ch */
    972    uint16_t                IOCStatus;                  /* 0Eh */
    973    uint32_t                IOCLogInfo;                 /* 10h */
    974    uint8_t                 PageVersion;                /* 14h */
    975    uint8_t                 PageLength;                 /* 15h */
    976    uint8_t                 PageNumber;                 /* 16h */
    977    uint8_t                 PageType;                   /* 17h */
    978} QEMU_PACKED MPIMsgConfigReply;
    979
    980enum {
    981    /* PageAddress field values */
    982    MPI_CONFIG_PAGEATTR_READ_ONLY               = 0x00,
    983    MPI_CONFIG_PAGEATTR_CHANGEABLE              = 0x10,
    984    MPI_CONFIG_PAGEATTR_PERSISTENT              = 0x20,
    985    MPI_CONFIG_PAGEATTR_RO_PERSISTENT           = 0x30,
    986    MPI_CONFIG_PAGEATTR_MASK                    = 0xF0,
    987
    988    MPI_CONFIG_PAGETYPE_IO_UNIT                 = 0x00,
    989    MPI_CONFIG_PAGETYPE_IOC                     = 0x01,
    990    MPI_CONFIG_PAGETYPE_BIOS                    = 0x02,
    991    MPI_CONFIG_PAGETYPE_SCSI_PORT               = 0x03,
    992    MPI_CONFIG_PAGETYPE_SCSI_DEVICE             = 0x04,
    993    MPI_CONFIG_PAGETYPE_FC_PORT                 = 0x05,
    994    MPI_CONFIG_PAGETYPE_FC_DEVICE               = 0x06,
    995    MPI_CONFIG_PAGETYPE_LAN                     = 0x07,
    996    MPI_CONFIG_PAGETYPE_RAID_VOLUME             = 0x08,
    997    MPI_CONFIG_PAGETYPE_MANUFACTURING           = 0x09,
    998    MPI_CONFIG_PAGETYPE_RAID_PHYSDISK           = 0x0A,
    999    MPI_CONFIG_PAGETYPE_INBAND                  = 0x0B,
   1000    MPI_CONFIG_PAGETYPE_EXTENDED                = 0x0F,
   1001    MPI_CONFIG_PAGETYPE_MASK                    = 0x0F,
   1002
   1003    MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT          = 0x10,
   1004    MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER         = 0x11,
   1005    MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE           = 0x12,
   1006    MPI_CONFIG_EXTPAGETYPE_SAS_PHY              = 0x13,
   1007    MPI_CONFIG_EXTPAGETYPE_LOG                  = 0x14,
   1008    MPI_CONFIG_EXTPAGETYPE_ENCLOSURE            = 0x15,
   1009
   1010    MPI_SCSI_PORT_PGAD_PORT_MASK                = 0x000000FF,
   1011
   1012    MPI_SCSI_DEVICE_FORM_MASK                   = 0xF0000000,
   1013    MPI_SCSI_DEVICE_FORM_BUS_TID                = 0x00000000,
   1014    MPI_SCSI_DEVICE_TARGET_ID_MASK              = 0x000000FF,
   1015    MPI_SCSI_DEVICE_TARGET_ID_SHIFT             = 0,
   1016    MPI_SCSI_DEVICE_BUS_MASK                    = 0x0000FF00,
   1017    MPI_SCSI_DEVICE_BUS_SHIFT                   = 8,
   1018    MPI_SCSI_DEVICE_FORM_TARGET_MODE            = 0x10000000,
   1019    MPI_SCSI_DEVICE_TM_RESPOND_ID_MASK          = 0x000000FF,
   1020    MPI_SCSI_DEVICE_TM_RESPOND_ID_SHIFT         = 0,
   1021    MPI_SCSI_DEVICE_TM_BUS_MASK                 = 0x0000FF00,
   1022    MPI_SCSI_DEVICE_TM_BUS_SHIFT                = 8,
   1023    MPI_SCSI_DEVICE_TM_INIT_ID_MASK             = 0x00FF0000,
   1024    MPI_SCSI_DEVICE_TM_INIT_ID_SHIFT            = 16,
   1025
   1026    MPI_FC_PORT_PGAD_PORT_MASK                  = 0xF0000000,
   1027    MPI_FC_PORT_PGAD_PORT_SHIFT                 = 28,
   1028    MPI_FC_PORT_PGAD_FORM_MASK                  = 0x0F000000,
   1029    MPI_FC_PORT_PGAD_FORM_INDEX                 = 0x01000000,
   1030    MPI_FC_PORT_PGAD_INDEX_MASK                 = 0x0000FFFF,
   1031    MPI_FC_PORT_PGAD_INDEX_SHIFT                = 0,
   1032
   1033    MPI_FC_DEVICE_PGAD_PORT_MASK                = 0xF0000000,
   1034    MPI_FC_DEVICE_PGAD_PORT_SHIFT               = 28,
   1035    MPI_FC_DEVICE_PGAD_FORM_MASK                = 0x0F000000,
   1036    MPI_FC_DEVICE_PGAD_FORM_NEXT_DID            = 0x00000000,
   1037    MPI_FC_DEVICE_PGAD_ND_PORT_MASK             = 0xF0000000,
   1038    MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT            = 28,
   1039    MPI_FC_DEVICE_PGAD_ND_DID_MASK              = 0x00FFFFFF,
   1040    MPI_FC_DEVICE_PGAD_ND_DID_SHIFT             = 0,
   1041    MPI_FC_DEVICE_PGAD_FORM_BUS_TID             = 0x01000000,
   1042    MPI_FC_DEVICE_PGAD_BT_BUS_MASK              = 0x0000FF00,
   1043    MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT             = 8,
   1044    MPI_FC_DEVICE_PGAD_BT_TID_MASK              = 0x000000FF,
   1045    MPI_FC_DEVICE_PGAD_BT_TID_SHIFT             = 0,
   1046
   1047    MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK          = 0x000000FF,
   1048    MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT         = 0,
   1049
   1050    MPI_SAS_EXPAND_PGAD_FORM_MASK             = 0xF0000000,
   1051    MPI_SAS_EXPAND_PGAD_FORM_SHIFT            = 28,
   1052    MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE  = 0x00000000,
   1053    MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM   = 0x00000001,
   1054    MPI_SAS_EXPAND_PGAD_FORM_HANDLE           = 0x00000002,
   1055    MPI_SAS_EXPAND_PGAD_GNH_MASK_HANDLE       = 0x0000FFFF,
   1056    MPI_SAS_EXPAND_PGAD_GNH_SHIFT_HANDLE      = 0,
   1057    MPI_SAS_EXPAND_PGAD_HPN_MASK_PHY          = 0x00FF0000,
   1058    MPI_SAS_EXPAND_PGAD_HPN_SHIFT_PHY         = 16,
   1059    MPI_SAS_EXPAND_PGAD_HPN_MASK_HANDLE       = 0x0000FFFF,
   1060    MPI_SAS_EXPAND_PGAD_HPN_SHIFT_HANDLE      = 0,
   1061    MPI_SAS_EXPAND_PGAD_H_MASK_HANDLE         = 0x0000FFFF,
   1062    MPI_SAS_EXPAND_PGAD_H_SHIFT_HANDLE        = 0,
   1063
   1064    MPI_SAS_DEVICE_PGAD_FORM_MASK               = 0xF0000000,
   1065    MPI_SAS_DEVICE_PGAD_FORM_SHIFT              = 28,
   1066    MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE    = 0x00000000,
   1067    MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID      = 0x00000001,
   1068    MPI_SAS_DEVICE_PGAD_FORM_HANDLE             = 0x00000002,
   1069    MPI_SAS_DEVICE_PGAD_GNH_HANDLE_MASK         = 0x0000FFFF,
   1070    MPI_SAS_DEVICE_PGAD_GNH_HANDLE_SHIFT        = 0,
   1071    MPI_SAS_DEVICE_PGAD_BT_BUS_MASK             = 0x0000FF00,
   1072    MPI_SAS_DEVICE_PGAD_BT_BUS_SHIFT            = 8,
   1073    MPI_SAS_DEVICE_PGAD_BT_TID_MASK             = 0x000000FF,
   1074    MPI_SAS_DEVICE_PGAD_BT_TID_SHIFT            = 0,
   1075    MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK           = 0x0000FFFF,
   1076    MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT          = 0,
   1077
   1078    MPI_SAS_PHY_PGAD_FORM_MASK                  = 0xF0000000,
   1079    MPI_SAS_PHY_PGAD_FORM_SHIFT                 = 28,
   1080    MPI_SAS_PHY_PGAD_FORM_PHY_NUMBER            = 0x0,
   1081    MPI_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX         = 0x1,
   1082    MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK            = 0x000000FF,
   1083    MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT           = 0,
   1084    MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK         = 0x0000FFFF,
   1085    MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_SHIFT        = 0,
   1086
   1087    MPI_SAS_ENCLOS_PGAD_FORM_MASK               = 0xF0000000,
   1088    MPI_SAS_ENCLOS_PGAD_FORM_SHIFT              = 28,
   1089    MPI_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE    = 0x00000000,
   1090    MPI_SAS_ENCLOS_PGAD_FORM_HANDLE             = 0x00000001,
   1091    MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_MASK         = 0x0000FFFF,
   1092    MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_SHIFT        = 0,
   1093    MPI_SAS_ENCLOS_PGAD_H_HANDLE_MASK           = 0x0000FFFF,
   1094    MPI_SAS_ENCLOS_PGAD_H_HANDLE_SHIFT          = 0,
   1095};
   1096
   1097/* Too many structs and definitions... see mptconfig.c for the few
   1098 * that are used.
   1099 */
   1100
   1101/****************************************************************************/
   1102/*  Firmware Upload message and associated structures                       */
   1103/****************************************************************************/
   1104
   1105enum {
   1106    /* defines for using the ProductId field */
   1107    MPI_FW_HEADER_PID_TYPE_MASK                     = 0xF000,
   1108    MPI_FW_HEADER_PID_TYPE_SCSI                     = 0x0000,
   1109    MPI_FW_HEADER_PID_TYPE_FC                       = 0x1000,
   1110    MPI_FW_HEADER_PID_TYPE_SAS                      = 0x2000,
   1111
   1112    MPI_FW_HEADER_PID_PROD_MASK                     = 0x0F00,
   1113    MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI           = 0x0100,
   1114    MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI    = 0x0200,
   1115    MPI_FW_HEADER_PID_PROD_TARGET_SCSI              = 0x0300,
   1116    MPI_FW_HEADER_PID_PROD_IM_SCSI                  = 0x0400,
   1117    MPI_FW_HEADER_PID_PROD_IS_SCSI                  = 0x0500,
   1118    MPI_FW_HEADER_PID_PROD_CTX_SCSI                 = 0x0600,
   1119    MPI_FW_HEADER_PID_PROD_IR_SCSI                  = 0x0700,
   1120
   1121    MPI_FW_HEADER_PID_FAMILY_MASK                   = 0x00FF,
   1122
   1123    /* SCSI */
   1124    MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI            = 0x0001,
   1125    MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI            = 0x0002,
   1126    MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI            = 0x0003,
   1127    MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI            = 0x0004,
   1128    MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI            = 0x0005,
   1129    MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI            = 0x0006,
   1130    MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI            = 0x0007,
   1131    MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI            = 0x0008,
   1132    MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI            = 0x0009,
   1133    MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI            = 0x000A,
   1134    MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI           = 0x000B,
   1135    MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI           = 0x000C,
   1136
   1137    /* Fibre Channel */
   1138    MPI_FW_HEADER_PID_FAMILY_909_FC                 = 0x0000,
   1139    MPI_FW_HEADER_PID_FAMILY_919_FC                 = 0x0001, /* 919 and 929     */
   1140    MPI_FW_HEADER_PID_FAMILY_919X_FC                = 0x0002, /* 919X and 929X   */
   1141    MPI_FW_HEADER_PID_FAMILY_919XL_FC               = 0x0003, /* 919XL and 929XL */
   1142    MPI_FW_HEADER_PID_FAMILY_939X_FC                = 0x0004, /* 939X and 949X   */
   1143    MPI_FW_HEADER_PID_FAMILY_959_FC                 = 0x0005,
   1144    MPI_FW_HEADER_PID_FAMILY_949E_FC                = 0x0006,
   1145
   1146    /* SAS */
   1147    MPI_FW_HEADER_PID_FAMILY_1064_SAS               = 0x0001,
   1148    MPI_FW_HEADER_PID_FAMILY_1068_SAS               = 0x0002,
   1149    MPI_FW_HEADER_PID_FAMILY_1078_SAS               = 0x0003,
   1150    MPI_FW_HEADER_PID_FAMILY_106xE_SAS              = 0x0004, /* 1068E, 1066E, and 1064E */
   1151};
   1152
   1153#endif