cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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sh7750_regnames.c (2334B)


      1#include "qemu/osdep.h"
      2#include "hw/sh4/sh.h"
      3#include "sh7750_regs.h"
      4#include "sh7750_regnames.h"
      5
      6#define REGNAME(r) {r, #r},
      7
      8typedef struct {
      9    uint32_t regaddr;
     10    const char *regname;
     11} regname_t;
     12
     13static regname_t regnames[] = {
     14    REGNAME(SH7750_PTEH_A7)
     15	REGNAME(SH7750_PTEL_A7)
     16	REGNAME(SH7750_PTEA_A7)
     17	REGNAME(SH7750_TTB_A7)
     18	REGNAME(SH7750_TEA_A7)
     19	REGNAME(SH7750_MMUCR_A7)
     20	REGNAME(SH7750_CCR_A7)
     21	REGNAME(SH7750_QACR0_A7)
     22	REGNAME(SH7750_QACR1_A7)
     23	REGNAME(SH7750_TRA_A7)
     24	REGNAME(SH7750_EXPEVT_A7)
     25	REGNAME(SH7750_INTEVT_A7)
     26	REGNAME(SH7750_STBCR_A7)
     27	REGNAME(SH7750_STBCR2_A7)
     28	REGNAME(SH7750_FRQCR_A7)
     29	REGNAME(SH7750_WTCNT_A7)
     30	REGNAME(SH7750_WTCSR_A7)
     31	REGNAME(SH7750_R64CNT_A7)
     32	REGNAME(SH7750_RSECCNT_A7)
     33	REGNAME(SH7750_RMINCNT_A7)
     34	REGNAME(SH7750_RHRCNT_A7)
     35	REGNAME(SH7750_RWKCNT_A7)
     36	REGNAME(SH7750_RDAYCNT_A7)
     37	REGNAME(SH7750_RMONCNT_A7)
     38	REGNAME(SH7750_RYRCNT_A7)
     39	REGNAME(SH7750_RSECAR_A7)
     40	REGNAME(SH7750_RMINAR_A7)
     41	REGNAME(SH7750_RHRAR_A7)
     42	REGNAME(SH7750_RWKAR_A7)
     43	REGNAME(SH7750_RDAYAR_A7)
     44	REGNAME(SH7750_RMONAR_A7)
     45	REGNAME(SH7750_RCR1_A7)
     46	REGNAME(SH7750_RCR2_A7)
     47	REGNAME(SH7750_BCR1_A7)
     48	REGNAME(SH7750_BCR2_A7)
     49	REGNAME(SH7750_WCR1_A7)
     50	REGNAME(SH7750_WCR2_A7)
     51	REGNAME(SH7750_WCR3_A7)
     52	REGNAME(SH7750_MCR_A7)
     53	REGNAME(SH7750_PCR_A7)
     54	REGNAME(SH7750_RTCSR_A7)
     55	REGNAME(SH7750_RTCNT_A7)
     56	REGNAME(SH7750_RTCOR_A7)
     57	REGNAME(SH7750_RFCR_A7)
     58	REGNAME(SH7750_SAR0_A7)
     59	REGNAME(SH7750_SAR1_A7)
     60	REGNAME(SH7750_SAR2_A7)
     61	REGNAME(SH7750_SAR3_A7)
     62	REGNAME(SH7750_DAR0_A7)
     63	REGNAME(SH7750_DAR1_A7)
     64	REGNAME(SH7750_DAR2_A7)
     65	REGNAME(SH7750_DAR3_A7)
     66	REGNAME(SH7750_DMATCR0_A7)
     67	REGNAME(SH7750_DMATCR1_A7)
     68	REGNAME(SH7750_DMATCR2_A7)
     69	REGNAME(SH7750_DMATCR3_A7)
     70	REGNAME(SH7750_CHCR0_A7)
     71	REGNAME(SH7750_CHCR1_A7)
     72	REGNAME(SH7750_CHCR2_A7)
     73	REGNAME(SH7750_CHCR3_A7)
     74	REGNAME(SH7750_DMAOR_A7)
     75	REGNAME(SH7750_PCTRA_A7)
     76	REGNAME(SH7750_PDTRA_A7)
     77	REGNAME(SH7750_PCTRB_A7)
     78	REGNAME(SH7750_PDTRB_A7)
     79	REGNAME(SH7750_GPIOIC_A7)
     80	REGNAME(SH7750_ICR_A7)
     81	REGNAME(SH7750_BCR3_A7)
     82	REGNAME(SH7750_BCR4_A7)
     83	REGNAME(SH7750_SDMR2_A7)
     84	REGNAME(SH7750_SDMR3_A7) {(uint32_t) - 1, NULL}
     85};
     86
     87const char *regname(uint32_t addr)
     88{
     89    unsigned int i;
     90
     91    for (i = 0; regnames[i].regaddr != (uint32_t) - 1; i++) {
     92	if (regnames[i].regaddr == addr)
     93	    return regnames[i].regname;
     94    }
     95
     96    return "<unknown reg>";
     97}