cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

shix.c (3111B)

      1/*
      2 * SHIX 2.0 board description
      3 *
      4 * Copyright (c) 2005 Samuel Tardieu
      5 *
      6 * Permission is hereby granted, free of charge, to any person obtaining a copy
      7 * of this software and associated documentation files (the "Software"), to deal
      8 * in the Software without restriction, including without limitation the rights
      9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     10 * copies of the Software, and to permit persons to whom the Software is
     11 * furnished to do so, subject to the following conditions:
     12 *
     13 * The above copyright notice and this permission notice shall be included in
     14 * all copies or substantial portions of the Software.
     15 *
     16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
     19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     22 * THE SOFTWARE.
     23 */
     24/*
     25   Shix 2.0 board by Alexis Polti, described at
     26   https://web.archive.org/web/20070917001736/perso.enst.fr/~polti/realisations/shix20
     27
     28   More information in target/sh4/README.sh4
     29*/
     30#include "qemu/osdep.h"
     31#include "qapi/error.h"
     32#include "cpu.h"
     33#include "hw/sh4/sh.h"
     34#include "sysemu/qtest.h"
     35#include "hw/boards.h"
     36#include "hw/loader.h"
     37#include "qemu/error-report.h"
     38
     39#define BIOS_FILENAME "shix_bios.bin"
     40#define BIOS_ADDRESS 0xA0000000
     41
     42static void shix_init(MachineState *machine)
     43{
     44    int ret;
     45    SuperHCPU *cpu;
     46    struct SH7750State *s;
     47    MemoryRegion *sysmem = get_system_memory();
     48    MemoryRegion *rom = g_new(MemoryRegion, 1);
     49    MemoryRegion *sdram = g_new(MemoryRegion, 2);
     50    const char *bios_name = machine->firmware ?: BIOS_FILENAME;
     51    
     52    cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
     53
     54    /* Allocate memory space */
     55    memory_region_init_rom(rom, NULL, "shix.rom", 0x4000, &error_fatal);
     56    memory_region_add_subregion(sysmem, 0x00000000, rom);
     57    memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000,
     58                           &error_fatal);
     59    memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
     60    memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000,
     61                           &error_fatal);
     62    memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
     63
     64    /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
     65    ret = load_image_targphys(bios_name, 0, 0x4000);
     66    if (ret < 0 && !qtest_enabled()) {
     67        error_report("Could not load SHIX bios '%s'", bios_name);
     68        exit(1);
     69    }
     70
     71    /* Register peripherals */
     72    s = sh7750_init(cpu, sysmem);
     73    /* XXXXX Check success */
     74    tc58128_init(s, "shix_linux_nand.bin", NULL);
     75}
     76
     77static void shix_machine_init(MachineClass *mc)
     78{
     79    mc->desc = "shix card";
     80    mc->init = shix_init;
     81    mc->is_default = true;
     82    mc->default_cpu_type = TYPE_SH7750R_CPU;
     83}
     84
     85DEFINE_MACHINE("shix", shix_machine_init)