trace-events - cachepc-qemu - Fork of AMDESE/qemu with changes for cachepc side-channel attack

	cachepc-qemu Fork of AMDESE/qemu with changes for cachepc side-channel attack
	git clone https://git.sinitax.com/sinitax/cachepc-qemu
	Log \| Files \| Refs \| Submodules \| LICENSE \| sfeed.txt

trace-events (1073B)

      1# See docs/devel/tracing.rst for syntax documentation.
      2
      3# sun4m.c
      4sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
      5sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
      6
      7# sun4m_iommu.c
      8sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
      9sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
     10sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64
     11sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x"
     12sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x"
     13sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x"
     14sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x"
     15sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64
     16
     17# leon3.c
     18leon3_set_irq(int intno) "Set CPU IRQ %d"
     19leon3_reset_irq(int intno) "Reset CPU IRQ %d"
     20int_helper_icache_freeze(void) "Instruction cache: freeze"
     21int_helper_dcache_freeze(void) "Data cache: freeze"