cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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tricore_testdevice.c (2518B)

      1/*
      2 *  Copyright (c) 2018-2021 Bastian Koppelmann Paderborn University
      3 *
      4 * This library is free software; you can redistribute it and/or
      5 * modify it under the terms of the GNU Lesser General Public
      6 * License as published by the Free Software Foundation; either
      7 * version 2 of the License, or (at your option) any later version.
      8 *
      9 * This library is distributed in the hope that it will be useful,
     10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     12 * Lesser General Public License for more details.
     13 *
     14 * You should have received a copy of the GNU Lesser General Public
     15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
     16 */
     17
     18#include "qemu/osdep.h"
     19#include "hw/sysbus.h"
     20#include "hw/qdev-properties.h"
     21#include "hw/tricore/tricore_testdevice.h"
     22
     23static void tricore_testdevice_write(void *opaque, hwaddr offset,
     24                                      uint64_t value, unsigned size)
     25{
     26    exit(value);
     27}
     28
     29static uint64_t tricore_testdevice_read(void *opaque, hwaddr offset,
     30                                         unsigned size)
     31{
     32    return 0xdeadbeef;
     33}
     34
     35static void tricore_testdevice_reset(DeviceState *dev)
     36{
     37}
     38
     39static const MemoryRegionOps tricore_testdevice_ops = {
     40    .read = tricore_testdevice_read,
     41    .write = tricore_testdevice_write,
     42    .valid = {
     43        .min_access_size = 4,
     44        .max_access_size = 4,
     45    },
     46    .endianness = DEVICE_NATIVE_ENDIAN,
     47};
     48
     49static void tricore_testdevice_init(Object *obj)
     50{
     51    TriCoreTestDeviceState *s = TRICORE_TESTDEVICE(obj);
     52   /* map memory */
     53    memory_region_init_io(&s->iomem, OBJECT(s), &tricore_testdevice_ops, s,
     54                          "tricore_testdevice", 0x4);
     55}
     56
     57static Property tricore_testdevice_properties[] = {
     58    DEFINE_PROP_END_OF_LIST()
     59};
     60
     61static void tricore_testdevice_class_init(ObjectClass *klass, void *data)
     62{
     63    DeviceClass *dc = DEVICE_CLASS(klass);
     64
     65    device_class_set_props(dc, tricore_testdevice_properties);
     66    dc->reset = tricore_testdevice_reset;
     67}
     68
     69static const TypeInfo tricore_testdevice_info = {
     70    .name          = TYPE_TRICORE_TESTDEVICE,
     71    .parent        = TYPE_SYS_BUS_DEVICE,
     72    .instance_size = sizeof(TriCoreTestDeviceState),
     73    .instance_init = tricore_testdevice_init,
     74    .class_init    = tricore_testdevice_class_init,
     75};
     76
     77static void tricore_testdevice_register_types(void)
     78{
     79    type_register_static(&tricore_testdevice_info);
     80}
     81
     82type_init(tricore_testdevice_register_types)