cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

wdt_i6300esb.c (15605B)


      1/*
      2 * Virtual hardware watchdog.
      3 *
      4 * Copyright (C) 2009 Red Hat Inc.
      5 *
      6 * This program is free software; you can redistribute it and/or
      7 * modify it under the terms of the GNU General Public License
      8 * as published by the Free Software Foundation; either version 2
      9 * of the License, or (at your option) any later version.
     10 *
     11 * This program is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14 * GNU General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU General Public License
     17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
     18 *
     19 * By Richard W.M. Jones (rjones@redhat.com).
     20 */
     21
     22#include "qemu/osdep.h"
     23
     24#include "qemu/module.h"
     25#include "qemu/timer.h"
     26#include "sysemu/watchdog.h"
     27#include "hw/pci/pci.h"
     28#include "migration/vmstate.h"
     29#include "qom/object.h"
     30
     31/*#define I6300ESB_DEBUG 1*/
     32
     33#ifdef I6300ESB_DEBUG
     34#define i6300esb_debug(fs,...) \
     35    fprintf(stderr,"i6300esb: %s: "fs,__func__,##__VA_ARGS__)
     36#else
     37#define i6300esb_debug(fs,...)
     38#endif
     39
     40/* PCI configuration registers */
     41#define ESB_CONFIG_REG  0x60            /* Config register                   */
     42#define ESB_LOCK_REG    0x68            /* WDT lock register                 */
     43
     44/* Memory mapped registers (offset from base address) */
     45#define ESB_TIMER1_REG  0x00            /* Timer1 value after each reset     */
     46#define ESB_TIMER2_REG  0x04            /* Timer2 value after each reset     */
     47#define ESB_GINTSR_REG  0x08            /* General Interrupt Status Register */
     48#define ESB_RELOAD_REG  0x0c            /* Reload register                   */
     49
     50/* Lock register bits */
     51#define ESB_WDT_FUNC    (0x01 << 2)   /* Watchdog functionality            */
     52#define ESB_WDT_ENABLE  (0x01 << 1)   /* Enable WDT                        */
     53#define ESB_WDT_LOCK    (0x01 << 0)   /* Lock (nowayout)                   */
     54
     55/* Config register bits */
     56#define ESB_WDT_REBOOT  (0x01 << 5)   /* Enable reboot on timeout          */
     57#define ESB_WDT_FREQ    (0x01 << 2)   /* Decrement frequency               */
     58#define ESB_WDT_INTTYPE (0x11 << 0)   /* Interrupt type on timer1 timeout  */
     59
     60/* Reload register bits */
     61#define ESB_WDT_RELOAD  (0x01 << 8)    /* prevent timeout                   */
     62
     63/* Magic constants */
     64#define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
     65#define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */
     66
     67/* Device state. */
     68struct I6300State {
     69    PCIDevice dev;
     70    MemoryRegion io_mem;
     71
     72    int reboot_enabled;         /* "Reboot" on timer expiry.  The real action
     73                                 * performed depends on the -watchdog-action
     74                                 * param passed on QEMU command line.
     75                                 */
     76    int clock_scale;            /* Clock scale. */
     77#define CLOCK_SCALE_1KHZ 0
     78#define CLOCK_SCALE_1MHZ 1
     79
     80    int int_type;               /* Interrupt type generated. */
     81#define INT_TYPE_IRQ 0          /* APIC 1, INT 10 */
     82#define INT_TYPE_SMI 2
     83#define INT_TYPE_DISABLED 3
     84
     85    int free_run;               /* If true, reload timer on expiry. */
     86    int locked;                 /* If true, enabled field cannot be changed. */
     87    int enabled;                /* If true, watchdog is enabled. */
     88
     89    QEMUTimer *timer;           /* The actual watchdog timer. */
     90
     91    uint32_t timer1_preload;    /* Values preloaded into timer1, timer2. */
     92    uint32_t timer2_preload;
     93    int stage;                  /* Stage (1 or 2). */
     94
     95    int unlock_state;           /* Guest writes 0x80, 0x86 to unlock the
     96                                 * registers, and we transition through
     97                                 * states 0 -> 1 -> 2 when this happens.
     98                                 */
     99
    100    int previous_reboot_flag;   /* If the watchdog caused the previous
    101                                 * reboot, this flag will be set.
    102                                 */
    103};
    104
    105
    106#define TYPE_WATCHDOG_I6300ESB_DEVICE "i6300esb"
    107OBJECT_DECLARE_SIMPLE_TYPE(I6300State, WATCHDOG_I6300ESB_DEVICE)
    108
    109/* This function is called when the watchdog has either been enabled
    110 * (hence it starts counting down) or has been keep-alived.
    111 */
    112static void i6300esb_restart_timer(I6300State *d, int stage)
    113{
    114    int64_t timeout;
    115
    116    if (!d->enabled)
    117        return;
    118
    119    d->stage = stage;
    120
    121    if (d->stage <= 1)
    122        timeout = d->timer1_preload;
    123    else
    124        timeout = d->timer2_preload;
    125
    126    if (d->clock_scale == CLOCK_SCALE_1KHZ)
    127        timeout <<= 15;
    128    else
    129        timeout <<= 5;
    130
    131    /* Get the timeout in nanoseconds. */
    132
    133    timeout = timeout * 30; /* on a PCI bus, 1 tick is 30 ns*/
    134
    135    i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
    136
    137    timer_mod(d->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout);
    138}
    139
    140/* This is called when the guest disables the watchdog. */
    141static void i6300esb_disable_timer(I6300State *d)
    142{
    143    i6300esb_debug("timer disabled\n");
    144
    145    timer_del(d->timer);
    146}
    147
    148static void i6300esb_reset(DeviceState *dev)
    149{
    150    PCIDevice *pdev = PCI_DEVICE(dev);
    151    I6300State *d = WATCHDOG_I6300ESB_DEVICE(pdev);
    152
    153    i6300esb_debug("I6300State = %p\n", d);
    154
    155    i6300esb_disable_timer(d);
    156
    157    /* NB: Don't change d->previous_reboot_flag in this function. */
    158
    159    d->reboot_enabled = 1;
    160    d->clock_scale = CLOCK_SCALE_1KHZ;
    161    d->int_type = INT_TYPE_IRQ;
    162    d->free_run = 0;
    163    d->locked = 0;
    164    d->enabled = 0;
    165    d->timer1_preload = 0xfffff;
    166    d->timer2_preload = 0xfffff;
    167    d->stage = 1;
    168    d->unlock_state = 0;
    169}
    170
    171/* This function is called when the watchdog expires.  Note that
    172 * the hardware has two timers, and so expiry happens in two stages.
    173 * If d->stage == 1 then we perform the first stage action (usually,
    174 * sending an interrupt) and then restart the timer again for the
    175 * second stage.  If the second stage expires then the watchdog
    176 * really has run out.
    177 */
    178static void i6300esb_timer_expired(void *vp)
    179{
    180    I6300State *d = vp;
    181
    182    i6300esb_debug("stage %d\n", d->stage);
    183
    184    if (d->stage == 1) {
    185        /* What to do at the end of stage 1? */
    186        switch (d->int_type) {
    187        case INT_TYPE_IRQ:
    188            fprintf(stderr, "i6300esb_timer_expired: I would send APIC 1 INT 10 here if I knew how (XXX)\n");
    189            break;
    190        case INT_TYPE_SMI:
    191            fprintf(stderr, "i6300esb_timer_expired: I would send SMI here if I knew how (XXX)\n");
    192            break;
    193        }
    194
    195        /* Start the second stage. */
    196        i6300esb_restart_timer(d, 2);
    197    } else {
    198        /* Second stage expired, reboot for real. */
    199        if (d->reboot_enabled) {
    200            d->previous_reboot_flag = 1;
    201            watchdog_perform_action(); /* This reboots, exits, etc */
    202            i6300esb_reset(DEVICE(d));
    203        }
    204
    205        /* In "free running mode" we start stage 1 again. */
    206        if (d->free_run)
    207            i6300esb_restart_timer(d, 1);
    208    }
    209}
    210
    211static void i6300esb_config_write(PCIDevice *dev, uint32_t addr,
    212                                  uint32_t data, int len)
    213{
    214    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
    215    int old;
    216
    217    i6300esb_debug("addr = %x, data = %x, len = %d\n", addr, data, len);
    218
    219    if (addr == ESB_CONFIG_REG && len == 2) {
    220        d->reboot_enabled = (data & ESB_WDT_REBOOT) == 0;
    221        d->clock_scale =
    222            (data & ESB_WDT_FREQ) != 0 ? CLOCK_SCALE_1MHZ : CLOCK_SCALE_1KHZ;
    223        d->int_type = (data & ESB_WDT_INTTYPE);
    224    } else if (addr == ESB_LOCK_REG && len == 1) {
    225        if (!d->locked) {
    226            d->locked = (data & ESB_WDT_LOCK) != 0;
    227            d->free_run = (data & ESB_WDT_FUNC) != 0;
    228            old = d->enabled;
    229            d->enabled = (data & ESB_WDT_ENABLE) != 0;
    230            if (!old && d->enabled) /* Enabled transitioned from 0 -> 1 */
    231                i6300esb_restart_timer(d, 1);
    232            else if (!d->enabled)
    233                i6300esb_disable_timer(d);
    234        }
    235    } else {
    236        pci_default_write_config(dev, addr, data, len);
    237    }
    238}
    239
    240static uint32_t i6300esb_config_read(PCIDevice *dev, uint32_t addr, int len)
    241{
    242    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
    243    uint32_t data;
    244
    245    i6300esb_debug ("addr = %x, len = %d\n", addr, len);
    246
    247    if (addr == ESB_CONFIG_REG && len == 2) {
    248        data =
    249            (d->reboot_enabled ? 0 : ESB_WDT_REBOOT) |
    250            (d->clock_scale == CLOCK_SCALE_1MHZ ? ESB_WDT_FREQ : 0) |
    251            d->int_type;
    252        return data;
    253    } else if (addr == ESB_LOCK_REG && len == 1) {
    254        data =
    255            (d->free_run ? ESB_WDT_FUNC : 0) |
    256            (d->locked ? ESB_WDT_LOCK : 0) |
    257            (d->enabled ? ESB_WDT_ENABLE : 0);
    258        return data;
    259    } else {
    260        return pci_default_read_config(dev, addr, len);
    261    }
    262}
    263
    264static uint32_t i6300esb_mem_readb(void *vp, hwaddr addr)
    265{
    266    i6300esb_debug ("addr = %x\n", (int) addr);
    267
    268    return 0;
    269}
    270
    271static uint32_t i6300esb_mem_readw(void *vp, hwaddr addr)
    272{
    273    uint32_t data = 0;
    274    I6300State *d = vp;
    275
    276    i6300esb_debug("addr = %x\n", (int) addr);
    277
    278    if (addr == 0xc) {
    279        /* The previous reboot flag is really bit 9, but there is
    280         * a bug in the Linux driver where it thinks it's bit 12.
    281         * Set both.
    282         */
    283        data = d->previous_reboot_flag ? 0x1200 : 0;
    284    }
    285
    286    return data;
    287}
    288
    289static uint32_t i6300esb_mem_readl(void *vp, hwaddr addr)
    290{
    291    i6300esb_debug("addr = %x\n", (int) addr);
    292
    293    return 0;
    294}
    295
    296static void i6300esb_mem_writeb(void *vp, hwaddr addr, uint32_t val)
    297{
    298    I6300State *d = vp;
    299
    300    i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
    301
    302    if (addr == 0xc && val == 0x80)
    303        d->unlock_state = 1;
    304    else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
    305        d->unlock_state = 2;
    306}
    307
    308static void i6300esb_mem_writew(void *vp, hwaddr addr, uint32_t val)
    309{
    310    I6300State *d = vp;
    311
    312    i6300esb_debug("addr = %x, val = %x\n", (int) addr, val);
    313
    314    if (addr == 0xc && val == 0x80)
    315        d->unlock_state = 1;
    316    else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
    317        d->unlock_state = 2;
    318    else {
    319        if (d->unlock_state == 2) {
    320            if (addr == 0xc) {
    321                if ((val & 0x100) != 0)
    322                    /* This is the "ping" from the userspace watchdog in
    323                     * the guest ...
    324                     */
    325                    i6300esb_restart_timer(d, 1);
    326
    327                /* Setting bit 9 resets the previous reboot flag.
    328                 * There's a bug in the Linux driver where it sets
    329                 * bit 12 instead.
    330                 */
    331                if ((val & 0x200) != 0 || (val & 0x1000) != 0) {
    332                    d->previous_reboot_flag = 0;
    333                }
    334            }
    335
    336            d->unlock_state = 0;
    337        }
    338    }
    339}
    340
    341static void i6300esb_mem_writel(void *vp, hwaddr addr, uint32_t val)
    342{
    343    I6300State *d = vp;
    344
    345    i6300esb_debug ("addr = %x, val = %x\n", (int) addr, val);
    346
    347    if (addr == 0xc && val == 0x80)
    348        d->unlock_state = 1;
    349    else if (addr == 0xc && val == 0x86 && d->unlock_state == 1)
    350        d->unlock_state = 2;
    351    else {
    352        if (d->unlock_state == 2) {
    353            if (addr == 0)
    354                d->timer1_preload = val & 0xfffff;
    355            else if (addr == 4)
    356                d->timer2_preload = val & 0xfffff;
    357
    358            d->unlock_state = 0;
    359        }
    360    }
    361}
    362
    363static uint64_t i6300esb_mem_readfn(void *opaque, hwaddr addr, unsigned size)
    364{
    365    switch (size) {
    366    case 1:
    367        return i6300esb_mem_readb(opaque, addr);
    368    case 2:
    369        return i6300esb_mem_readw(opaque, addr);
    370    case 4:
    371        return i6300esb_mem_readl(opaque, addr);
    372    default:
    373        g_assert_not_reached();
    374    }
    375}
    376
    377static void i6300esb_mem_writefn(void *opaque, hwaddr addr,
    378                                 uint64_t value, unsigned size)
    379{
    380    switch (size) {
    381    case 1:
    382        i6300esb_mem_writeb(opaque, addr, value);
    383        break;
    384    case 2:
    385        i6300esb_mem_writew(opaque, addr, value);
    386        break;
    387    case 4:
    388        i6300esb_mem_writel(opaque, addr, value);
    389        break;
    390    default:
    391        g_assert_not_reached();
    392    }
    393}
    394
    395static const MemoryRegionOps i6300esb_ops = {
    396    .read = i6300esb_mem_readfn,
    397    .write = i6300esb_mem_writefn,
    398    .valid.min_access_size = 1,
    399    .valid.max_access_size = 4,
    400    .endianness = DEVICE_LITTLE_ENDIAN,
    401};
    402
    403static const VMStateDescription vmstate_i6300esb = {
    404    .name = "i6300esb_wdt",
    405    /* With this VMSD's introduction, version_id/minimum_version_id were
    406     * erroneously set to sizeof(I6300State), causing a somewhat random
    407     * version_id to be set for every build. This eventually broke
    408     * migration.
    409     *
    410     * To correct this without breaking old->new migration for older
    411     * versions of QEMU, we've set version_id to a value high enough
    412     * to exceed all past values of sizeof(I6300State) across various
    413     * build environments, and have reset minimum_version_id to 1,
    414     * since this VMSD has never changed and thus can accept all past
    415     * versions.
    416     *
    417     * For future changes we can treat these values as we normally would.
    418     */
    419    .version_id = 10000,
    420    .minimum_version_id = 1,
    421    .fields = (VMStateField[]) {
    422        VMSTATE_PCI_DEVICE(dev, I6300State),
    423        VMSTATE_INT32(reboot_enabled, I6300State),
    424        VMSTATE_INT32(clock_scale, I6300State),
    425        VMSTATE_INT32(int_type, I6300State),
    426        VMSTATE_INT32(free_run, I6300State),
    427        VMSTATE_INT32(locked, I6300State),
    428        VMSTATE_INT32(enabled, I6300State),
    429        VMSTATE_TIMER_PTR(timer, I6300State),
    430        VMSTATE_UINT32(timer1_preload, I6300State),
    431        VMSTATE_UINT32(timer2_preload, I6300State),
    432        VMSTATE_INT32(stage, I6300State),
    433        VMSTATE_INT32(unlock_state, I6300State),
    434        VMSTATE_INT32(previous_reboot_flag, I6300State),
    435        VMSTATE_END_OF_LIST()
    436    }
    437};
    438
    439static void i6300esb_realize(PCIDevice *dev, Error **errp)
    440{
    441    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
    442
    443    i6300esb_debug("I6300State = %p\n", d);
    444
    445    d->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, i6300esb_timer_expired, d);
    446    d->previous_reboot_flag = 0;
    447
    448    memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d,
    449                          "i6300esb", 0x10);
    450    pci_register_bar(&d->dev, 0, 0, &d->io_mem);
    451}
    452
    453static void i6300esb_exit(PCIDevice *dev)
    454{
    455    I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev);
    456
    457    timer_free(d->timer);
    458}
    459
    460static WatchdogTimerModel model = {
    461    .wdt_name = "i6300esb",
    462    .wdt_description = "Intel 6300ESB",
    463};
    464
    465static void i6300esb_class_init(ObjectClass *klass, void *data)
    466{
    467    DeviceClass *dc = DEVICE_CLASS(klass);
    468    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
    469
    470    k->config_read = i6300esb_config_read;
    471    k->config_write = i6300esb_config_write;
    472    k->realize = i6300esb_realize;
    473    k->exit = i6300esb_exit;
    474    k->vendor_id = PCI_VENDOR_ID_INTEL;
    475    k->device_id = PCI_DEVICE_ID_INTEL_ESB_9;
    476    k->class_id = PCI_CLASS_SYSTEM_OTHER;
    477    dc->reset = i6300esb_reset;
    478    dc->vmsd = &vmstate_i6300esb;
    479    set_bit(DEVICE_CATEGORY_MISC, dc->categories);
    480}
    481
    482static const TypeInfo i6300esb_info = {
    483    .name          = TYPE_WATCHDOG_I6300ESB_DEVICE,
    484    .parent        = TYPE_PCI_DEVICE,
    485    .instance_size = sizeof(I6300State),
    486    .class_init    = i6300esb_class_init,
    487    .interfaces = (InterfaceInfo[]) {
    488        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
    489        { },
    490    },
    491};
    492
    493static void i6300esb_register_types(void)
    494{
    495    watchdog_add_model(&model);
    496    type_register_static(&i6300esb_info);
    497}
    498
    499type_init(i6300esb_register_types)