cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

npcm7xx_adc.h (2117B)

      1/*
      2 * Nuvoton NPCM7xx ADC Module
      3 *
      4 * Copyright 2020 Google LLC
      5 *
      6 * This program is free software; you can redistribute it and/or modify it
      7 * under the terms of the GNU General Public License as published by the
      8 * Free Software Foundation; either version 2 of the License, or
      9 * (at your option) any later version.
     10 *
     11 * This program is distributed in the hope that it will be useful, but WITHOUT
     12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
     13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
     14 * for more details.
     15 */
     16#ifndef NPCM7XX_ADC_H
     17#define NPCM7XX_ADC_H
     18
     19#include "hw/clock.h"
     20#include "hw/irq.h"
     21#include "hw/sysbus.h"
     22#include "qemu/timer.h"
     23
     24#define NPCM7XX_ADC_NUM_INPUTS      8
     25/**
     26 * This value should not be changed unless write_adc_calibration function in
     27 * hw/arm/npcm7xx.c is also changed.
     28 */
     29#define NPCM7XX_ADC_NUM_CALIB       2
     30
     31/**
     32 * struct NPCM7xxADCState - Analog to Digital Converter Module device state.
     33 * @parent: System bus device.
     34 * @iomem: Memory region through which registers are accessed.
     35 * @conv_timer: The timer counts down remaining cycles for the conversion.
     36 * @irq: GIC interrupt line to fire on expiration (if enabled).
     37 * @con: The Control Register.
     38 * @data: The Data Buffer.
     39 * @clock: The ADC Clock.
     40 * @adci: The input voltage in units of uV. 1uv = 1e-6V.
     41 * @vref: The external reference voltage.
     42 * @iref: The internal reference voltage, initialized at launch time.
     43 * @rv: The calibrated output values of 0.5V and 1.5V for the ADC.
     44 */
     45typedef struct {
     46    SysBusDevice parent;
     47
     48    MemoryRegion iomem;
     49
     50    QEMUTimer    conv_timer;
     51
     52    qemu_irq     irq;
     53    uint32_t     con;
     54    uint32_t     data;
     55    Clock       *clock;
     56
     57    /* Voltages are in unit of uV. 1V = 1000000uV. */
     58    uint32_t     adci[NPCM7XX_ADC_NUM_INPUTS];
     59    uint32_t     vref;
     60    uint32_t     iref;
     61
     62    uint16_t     calibration_r_values[NPCM7XX_ADC_NUM_CALIB];
     63} NPCM7xxADCState;
     64
     65#define TYPE_NPCM7XX_ADC "npcm7xx-adc"
     66#define NPCM7XX_ADC(obj) \
     67    OBJECT_CHECK(NPCM7xxADCState, (obj), TYPE_NPCM7XX_ADC)
     68
     69#endif /* NPCM7XX_ADC_H */