cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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virt.h (5200B)


      1/*
      2 *
      3 * Copyright (c) 2015 Linaro Limited
      4 *
      5 * This program is free software; you can redistribute it and/or modify it
      6 * under the terms and conditions of the GNU General Public License,
      7 * version 2 or later, as published by the Free Software Foundation.
      8 *
      9 * This program is distributed in the hope it will be useful, but WITHOUT
     10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
     11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
     12 * more details.
     13 *
     14 * You should have received a copy of the GNU General Public License along with
     15 * this program.  If not, see <http://www.gnu.org/licenses/>.
     16 *
     17 * Emulate a virtual board which works by passing Linux all the information
     18 * it needs about what devices are present via the device tree.
     19 * There are some restrictions about what we can do here:
     20 *  + we can only present devices whose Linux drivers will work based
     21 *    purely on the device tree with no platform data at all
     22 *  + we want to present a very stripped-down minimalist platform,
     23 *    both because this reduces the security attack surface from the guest
     24 *    and also because it reduces our exposure to being broken when
     25 *    the kernel updates its device tree bindings and requires further
     26 *    information in a device binding that we aren't providing.
     27 * This is essentially the same approach kvmtool uses.
     28 */
     29
     30#ifndef QEMU_ARM_VIRT_H
     31#define QEMU_ARM_VIRT_H
     32
     33#include "exec/hwaddr.h"
     34#include "qemu/notify.h"
     35#include "hw/boards.h"
     36#include "hw/arm/boot.h"
     37#include "hw/block/flash.h"
     38#include "sysemu/kvm.h"
     39#include "hw/intc/arm_gicv3_common.h"
     40#include "qom/object.h"
     41
     42#define NUM_GICV2M_SPIS       64
     43#define NUM_VIRTIO_TRANSPORTS 32
     44#define NUM_SMMU_IRQS          4
     45
     46#define ARCH_GIC_MAINT_IRQ  9
     47
     48#define ARCH_TIMER_VIRT_IRQ   11
     49#define ARCH_TIMER_S_EL1_IRQ  13
     50#define ARCH_TIMER_NS_EL1_IRQ 14
     51#define ARCH_TIMER_NS_EL2_IRQ 10
     52
     53#define VIRTUAL_PMU_IRQ 7
     54
     55#define PPI(irq) ((irq) + 16)
     56
     57/* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
     58#define PVTIME_SIZE_PER_CPU 64
     59
     60enum {
     61    VIRT_FLASH,
     62    VIRT_MEM,
     63    VIRT_CPUPERIPHS,
     64    VIRT_GIC_DIST,
     65    VIRT_GIC_CPU,
     66    VIRT_GIC_V2M,
     67    VIRT_GIC_HYP,
     68    VIRT_GIC_VCPU,
     69    VIRT_GIC_ITS,
     70    VIRT_GIC_REDIST,
     71    VIRT_SMMU,
     72    VIRT_UART,
     73    VIRT_MMIO,
     74    VIRT_RTC,
     75    VIRT_FW_CFG,
     76    VIRT_PCIE,
     77    VIRT_PCIE_MMIO,
     78    VIRT_PCIE_PIO,
     79    VIRT_PCIE_ECAM,
     80    VIRT_PLATFORM_BUS,
     81    VIRT_GPIO,
     82    VIRT_SECURE_UART,
     83    VIRT_SECURE_MEM,
     84    VIRT_SECURE_GPIO,
     85    VIRT_PCDIMM_ACPI,
     86    VIRT_ACPI_GED,
     87    VIRT_NVDIMM_ACPI,
     88    VIRT_PVTIME,
     89    VIRT_LOWMEMMAP_LAST,
     90};
     91
     92/* indices of IO regions located after the RAM */
     93enum {
     94    VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
     95    VIRT_HIGH_PCIE_ECAM,
     96    VIRT_HIGH_PCIE_MMIO,
     97};
     98
     99typedef enum VirtIOMMUType {
    100    VIRT_IOMMU_NONE,
    101    VIRT_IOMMU_SMMUV3,
    102    VIRT_IOMMU_VIRTIO,
    103} VirtIOMMUType;
    104
    105typedef enum VirtMSIControllerType {
    106    VIRT_MSI_CTRL_NONE,
    107    VIRT_MSI_CTRL_GICV2M,
    108    VIRT_MSI_CTRL_ITS,
    109} VirtMSIControllerType;
    110
    111typedef enum VirtGICType {
    112    VIRT_GIC_VERSION_MAX,
    113    VIRT_GIC_VERSION_HOST,
    114    VIRT_GIC_VERSION_2,
    115    VIRT_GIC_VERSION_3,
    116    VIRT_GIC_VERSION_NOSEL,
    117} VirtGICType;
    118
    119struct VirtMachineClass {
    120    MachineClass parent;
    121    bool disallow_affinity_adjustment;
    122    bool no_its;
    123    bool no_tcg_its;
    124    bool no_pmu;
    125    bool claim_edge_triggered_timers;
    126    bool smbios_old_sys_ver;
    127    bool no_highmem_ecam;
    128    bool no_ged;   /* Machines < 4.2 has no support for ACPI GED device */
    129    bool kvm_no_adjvtime;
    130    bool no_kvm_steal_time;
    131    bool acpi_expose_flash;
    132    bool no_secure_gpio;
    133};
    134
    135struct VirtMachineState {
    136    MachineState parent;
    137    Notifier machine_done;
    138    DeviceState *platform_bus_dev;
    139    FWCfgState *fw_cfg;
    140    PFlashCFI01 *flash[2];
    141    bool secure;
    142    bool highmem;
    143    bool highmem_ecam;
    144    bool its;
    145    bool tcg_its;
    146    bool virt;
    147    bool ras;
    148    bool mte;
    149    OnOffAuto acpi;
    150    VirtGICType gic_version;
    151    VirtIOMMUType iommu;
    152    bool default_bus_bypass_iommu;
    153    VirtMSIControllerType msi_controller;
    154    uint16_t virtio_iommu_bdf;
    155    struct arm_boot_info bootinfo;
    156    MemMapEntry *memmap;
    157    char *pciehb_nodename;
    158    const int *irqmap;
    159    int fdt_size;
    160    uint32_t clock_phandle;
    161    uint32_t gic_phandle;
    162    uint32_t msi_phandle;
    163    uint32_t iommu_phandle;
    164    int psci_conduit;
    165    hwaddr highest_gpa;
    166    DeviceState *gic;
    167    DeviceState *acpi_dev;
    168    Notifier powerdown_notifier;
    169    PCIBus *bus;
    170    char *oem_id;
    171    char *oem_table_id;
    172};
    173
    174#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
    175
    176#define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
    177OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
    178
    179void virt_acpi_setup(VirtMachineState *vms);
    180bool virt_is_acpi_enabled(VirtMachineState *vms);
    181
    182/* Return the number of used redistributor regions  */
    183static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
    184{
    185    uint32_t redist0_capacity =
    186                vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
    187
    188    assert(vms->gic_version == VIRT_GIC_VERSION_3);
    189
    190    return MACHINE(vms)->smp.cpus > redist0_capacity ? 2 : 1;
    191}
    192
    193#endif /* QEMU_ARM_VIRT_H */