cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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arm_sbcon_i2c.h (918B)

      1/*
      2 * ARM SBCon two-wire serial bus interface (I2C bitbang)
      3 *   a.k.a.
      4 * ARM Versatile I2C controller
      5 *
      6 * Copyright (c) 2006-2007 CodeSourcery.
      7 * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
      8 * Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
      9 *
     10 * SPDX-License-Identifier: GPL-2.0-or-later
     11 */
     12#ifndef HW_I2C_ARM_SBCON_H
     13#define HW_I2C_ARM_SBCON_H
     14
     15#include "hw/sysbus.h"
     16#include "hw/i2c/bitbang_i2c.h"
     17#include "qom/object.h"
     18
     19#define TYPE_VERSATILE_I2C "versatile_i2c"
     20#define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C
     21
     22typedef struct ArmSbconI2CState ArmSbconI2CState;
     23DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C,
     24                         TYPE_ARM_SBCON_I2C)
     25
     26struct ArmSbconI2CState {
     27    /*< private >*/
     28    SysBusDevice parent_obj;
     29    /*< public >*/
     30
     31    MemoryRegion iomem;
     32    bitbang_i2c_interface bitbang;
     33    int out;
     34    int in;
     35};
     36
     37#endif /* HW_I2C_ARM_SBCON_H */