cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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arm_gicv3.h (751B)

      1/*
      2 * ARM Generic Interrupt Controller v3
      3 *
      4 * Copyright (c) 2015 Huawei.
      5 * Copyright (c) 2016 Linaro Limited
      6 * Written by Shlomo Pongratz, Peter Maydell
      7 *
      8 * This code is licensed under the GPL, version 2 or (at your option)
      9 * any later version.
     10 */
     11
     12#ifndef HW_ARM_GICV3_H
     13#define HW_ARM_GICV3_H
     14
     15#include "arm_gicv3_common.h"
     16#include "qom/object.h"
     17
     18#define TYPE_ARM_GICV3 "arm-gicv3"
     19typedef struct ARMGICv3Class ARMGICv3Class;
     20/* This is reusing the GICState typedef from TYPE_ARM_GICV3_COMMON */
     21DECLARE_OBJ_CHECKERS(GICv3State, ARMGICv3Class,
     22                     ARM_GICV3, TYPE_ARM_GICV3)
     23
     24struct ARMGICv3Class {
     25    /*< private >*/
     26    ARMGICv3CommonClass parent_class;
     27    /*< public >*/
     28
     29    DeviceRealize parent_realize;
     30};
     31
     32#endif