cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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npcm7xx_mc.h (1085B)

      1/*
      2 * Nuvoton NPCM7xx Memory Controller stub
      3 *
      4 * Copyright 2020 Google LLC
      5 *
      6 * This program is free software; you can redistribute it and/or modify it
      7 * under the terms of the GNU General Public License as published by the
      8 * Free Software Foundation; either version 2 of the License, or
      9 * (at your option) any later version.
     10 *
     11 * This program is distributed in the hope that it will be useful, but WITHOUT
     12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
     13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
     14 * for more details.
     15 */
     16#ifndef NPCM7XX_MC_H
     17#define NPCM7XX_MC_H
     18
     19#include "exec/memory.h"
     20#include "hw/sysbus.h"
     21
     22/**
     23 * struct NPCM7xxMCState - Device state for the memory controller.
     24 * @parent: System bus device.
     25 * @mmio: Memory region through which registers are accessed.
     26 */
     27typedef struct NPCM7xxMCState {
     28    SysBusDevice parent;
     29
     30    MemoryRegion mmio;
     31} NPCM7xxMCState;
     32
     33#define TYPE_NPCM7XX_MC "npcm7xx-mc"
     34#define NPCM7XX_MC(obj) OBJECT_CHECK(NPCM7xxMCState, (obj), TYPE_NPCM7XX_MC)
     35
     36#endif /* NPCM7XX_MC_H */