cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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aspeed_lpc.h (954B)

      1/*
      2 *  ASPEED LPC Controller
      3 *
      4 *  Copyright (C) 2017-2018 IBM Corp.
      5 *
      6 * This code is licensed under the GPL version 2 or later.  See
      7 * the COPYING file in the top-level directory.
      8 */
      9
     10#ifndef ASPEED_LPC_H
     11#define ASPEED_LPC_H
     12
     13#include "hw/sysbus.h"
     14
     15#include <stdint.h>
     16
     17#define TYPE_ASPEED_LPC "aspeed.lpc"
     18#define ASPEED_LPC(obj) OBJECT_CHECK(AspeedLPCState, (obj), TYPE_ASPEED_LPC)
     19
     20#define ASPEED_LPC_NR_REGS      (0x260 >> 2)
     21
     22enum aspeed_lpc_subdevice {
     23    aspeed_lpc_kcs_1 = 0,
     24    aspeed_lpc_kcs_2,
     25    aspeed_lpc_kcs_3,
     26    aspeed_lpc_kcs_4,
     27    aspeed_lpc_ibt,
     28};
     29
     30#define ASPEED_LPC_NR_SUBDEVS   5
     31
     32typedef struct AspeedLPCState {
     33    /* <private> */
     34    SysBusDevice parent;
     35
     36    /*< public >*/
     37    MemoryRegion iomem;
     38    qemu_irq irq;
     39
     40    qemu_irq subdevice_irqs[ASPEED_LPC_NR_SUBDEVS];
     41    uint32_t subdevice_irqs_pending;
     42
     43    uint32_t regs[ASPEED_LPC_NR_REGS];
     44    uint32_t hicr7;
     45} AspeedLPCState;
     46
     47#endif /* _ASPEED_LPC_H_ */