cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

aspeed_xdma.h (1066B)

      1/*
      2 * ASPEED XDMA Controller
      3 * Eddie James <eajames@linux.ibm.com>
      4 *
      5 * Copyright (C) 2019 IBM Corp.
      6 * SPDX-License-Identifier: GPL-2.0-or-later
      7 */
      8
      9#ifndef ASPEED_XDMA_H
     10#define ASPEED_XDMA_H
     11
     12#include "hw/sysbus.h"
     13#include "qom/object.h"
     14
     15#define TYPE_ASPEED_XDMA "aspeed.xdma"
     16#define TYPE_ASPEED_2400_XDMA TYPE_ASPEED_XDMA "-ast2400"
     17#define TYPE_ASPEED_2500_XDMA TYPE_ASPEED_XDMA "-ast2500"
     18#define TYPE_ASPEED_2600_XDMA TYPE_ASPEED_XDMA "-ast2600"
     19OBJECT_DECLARE_TYPE(AspeedXDMAState, AspeedXDMAClass, ASPEED_XDMA)
     20
     21#define ASPEED_XDMA_NUM_REGS (ASPEED_XDMA_REG_SIZE / sizeof(uint32_t))
     22#define ASPEED_XDMA_REG_SIZE 0x7C
     23
     24struct AspeedXDMAState {
     25    SysBusDevice parent;
     26
     27    MemoryRegion iomem;
     28    qemu_irq irq;
     29
     30    char bmc_cmdq_readp_set;
     31    uint32_t regs[ASPEED_XDMA_NUM_REGS];
     32};
     33
     34struct AspeedXDMAClass {
     35    SysBusDeviceClass parent_class;
     36
     37    uint8_t cmdq_endp;
     38    uint8_t cmdq_wrp;
     39    uint8_t cmdq_rdp;
     40    uint8_t intr_ctrl;
     41    uint32_t intr_ctrl_mask;
     42    uint8_t intr_status;
     43    uint32_t intr_complete;
     44};
     45
     46#endif /* ASPEED_XDMA_H */